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DP8105 Arkusz danych(PDF) 15 Page - Power-One |
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DP8105 Arkusz danych(HTML) 15 Page - Power-One |
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15 / 35 page ![]() DP8105 5A DC-DC Intelligent dPOL Data Sheet 8V to 14V Input •••• 0.7V to 5.5V Output BCD.00261 Rev. 1.0, 12 Feb 2013 www.power-one.com Page 15 of 35 Figure 21. Tracking Turn-On. Rising Slew Rate is Programmed at 0.5V/ms for each output. Figure 22. Turn-On with Different Rising Slew Rates. Rising Slew Rates are V1-1V/ms, V2-0.5V/ms, V3-0.2V/ms. Figure 23. Sequenced Turn-On. Rising Slew Rate is Programmed at 1V/ms. V2 Delay is 2ms, V3 delay is 4ms. Figure 24 Two outputs delayed 5ms. All slew rates at 0.5V/ms. 7.3.2.1 Pre-Bias In some applications, power may "leak" from a powered circuit to an unpowered bus, typically through ESD protection diodes. The dPWER ® controller in the DP8105 holds off turn on its output until the desired ramp up point crosses the pre-bias point, as seen in Figure 25. Figure 25. Turn On into Prebiased Load. V3 is Prebiased by V2 via a Diode. This figure was captured with an actual system where a diode was added to pre-bias a 1.5V bus from a 1.85V bus in order to simulate the effect of current leakage through protection circuits of unpowered logic connected to powered logic outputs (a common source of pre-bias in power systems). |
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