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45111 Arkusz danych(PDF) 118 Page - List of Unclassifed Manufacturers

Numer części 45111
Szczegółowy opis  14-DAY MONEY BACK GUARANTEE
PDF  184 Pages
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Producent  ETC2 [List of Unclassifed Manufacturers]
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45111 Arkusz danych(HTML) 118 Page - List of Unclassifed Manufacturers

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12 Appendix B: Instruction Set Overview
Page 118
• SX-Key/Blitz Development System Manual 2.0 • Parallax, Inc.
12.5 Instruction Set Quick Reference
This chart is a quick reference to command syntax, size, cycle time, CARRYX sensitivity and affected
flags and registers. An explanation of the abbreviations used, can be found on the next page.
Table 25 - SX Instruction Set Quick Reference
Instruction
Affects
W C Instruction
Affects
W
C
ADD
fr,W
fr C DC Z
1
1
MOV
W,{<<|>>}fr
W C
1
1
ADD
fr1,[#lit|fr2]
fr1 W C DC Z
2
2
MOV
W,<>fr
W
1
1
ADD
W,fr
W C DC Z
1
1
MOV
W,fr-W
W C DC Z
1
1
ADDB
fr,{/}op.bit
fr Z
2
2
MOV
W,[#lit|M]
W
1
1
AND
fr,W
fr Z
1
1
MOV
M,fr
W M Z
2
2
AND
fr1,[#lit|fr2]
fr1 W Z
2
2
MOV
M,[#lit|W]
M
1
1
AND
W,[#lit|fr]
W Z
1
1
MOV
!OPTION,[fr|#lit]
[W Z OPT|W OPT]
2
2
BANK
fr
FSR
1
1
MOV
!OPTION,W
OPT
1
1
CALL
addr8
PC
1
3
MOV
!port,[fr|#lit]
[W Z !port|W !port] 2
2
CJA
fr1,[#lit|fr2],addr9
W C DC Z
4 4,6 MOV
!port,W
!port (W)
1
1
CJAE
fr1,[#lit|fr2],addr9
W C DC Z
4 4,6 MOVB
op1.bit1,{/}op2.bit2
op1.bit1
4
4
CJB
fr1,[#lit|fr2],addr9
W C DC Z
4 4,6 MOVSZ W, [++|--]
W
1
1,2
CJBE
fr1,[#lit|fr2],addr9
W C DC Z
4 4,6 NOP
none
1
1
CJE
fr1,[#lit|fr2],addr9
W C DC Z
4 4,6 NOT
[fr|W]
[fr Z|W Z]
1
1
CJNE
fr1,[#lit|fr2],addr9
W C DC Z
4 4,6 OR
fr,W
fr Z
1
1
CLC
C
1
1
OR
fr1,[#lit|fr2]
fr1 W Z
2
2
CLR
[fr|W|!WDT]
[fr Z|W Z|(*1)]
1
1
OR
W,[fr, #lit]
W Z
1
1
CLRB
op.bit
op.bit
1
1
PAGE
addr12
PAx
1
1
CLZ
Z
1
1
RET
PC
1
3
CSA
fr1,[#lit|fr2]
W C DC Z
3 3,4 RETI
C DC Z PAx PC W
1
3
CSAE
fr1,[#lit|fr2]
W C DC Z
3 3,4 RETIW
RTCC (*2)
1
3
CSB
fr1,[#lit|fr2]
W C DC Z
3 3,4 RETP
PAx, PC
1
3
CSBE
fr1,[#lit|fr2]
W C DC Z
3 3,4 RETW
#lit{,#lit…}
PC W
x
3*x
CSE
fr1,[#lit|fr2]
W C DC Z
3 3,4 RL
fr
fr C
1
1
CSNE
fr1,[#lit|fr2]
W C DC Z
3 3,4 RR
fr
fr C
1
1
DEC
fr
fr Z
1
1
SB
op.bit
PC
1
1,2
DECSZ
fr
fr
1 1,2 SC
PC
1
1,2
DJNZ
fr,addr9
fr Z PC
2 2,4 SETB
op.bit
op.bit
1
1
IJNZ
fr,addr9
fr Z PC
2 2,4 SKIP
PC
1
2
INC
fr
fr Z
1
1
SLEEP
WDT TO PD
1
1
INCSZ
fr
fr
1 1,2 SNB
op.bit
PC
1
1,2
IREAD
MODE W
1
4
SNC
PC
1
1,2
JB
op.bit,addr9
PC
2 2,4 SNZ
PC
1
1,2
JC
addr9
PC
2 2,4 STC
C
1
1,2
JMP
[addr9|W]
PC
1
3
STZ
Z
1
1,2
JMP
[W|PC+W]
[PC|PC C DC Z]
1
3
SUB
fr1,[#lit|fr2]
fr1 W C DC Z
2
2
JNB
op.bit,addr9
PC
2 2,4 SUB
fr,W
fr C DC Z
1
1
JNC
addr9
PC
2 2,4 SUBB
fr,{/}op.bit
fr Z
2
2
JNZ
addr9
PC
2 2,4 SWAP
fr
fr
1
1
JZ
addr9
PC
2 2,4 SZ
PC
1
1,2
MODE
lit
M
1
1
TEST
[fr|W]
Z
1
1
MOV
fr, W
fr
1
1
XOR
fr1,[#lit|fr2]
fr1 W Z
2
2
MOV
fr1,[#lit|fr2]
[fr1 W|fr1 W Z]
2
2
XOR
fr,W
fr Z
1
1
MOV
fr,M
fr W
2
2
XOR
W,[fr|#lit]
W Z
1
1
MOV
W,{/|++|--}fr
W Z
1
1



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