45111 datasheet(8/184 Pages) ETC2

8 / 184 page

Table of Contents

Page 8

• SX-Key/Blitz Development System Manual 2.0 • Parallax, Inc.

15.2.2

Read-Modify-Write Considerations..................................................................................................151

15.2.3

Register Map Structure .......................................................................................................................151

15.2.4

Special Function Registers..................................................................................................................153

15.2.5

IND – The Indirect Register ($00)......................................................................................................153

15.2.6

Real Time Clock/Counter, WREG ($01)...........................................................................................153

15.2.7

PC – Program Counter ($02) ..............................................................................................................153

15.2.8

STATUS Register ($03)........................................................................................................................154

15.2.9

The FSR – File Select Register ($04) ...................................................................................................155

15.2.10 Direct Addressing................................................................................................................................156

15.2.11 Indirect Addressing.............................................................................................................................160

15.2.12 The Bank Instruction ...........................................................................................................................161

15.2.13 The Jump Instruction ..........................................................................................................................162

15.2.14 Jumping Across Pages.........................................................................................................................163

15.2.15 The Call Instruction.............................................................................................................................163

15.2.16 Calling Across Pages...........................................................................................................................164

15.2.17 Returning from a subroutine..............................................................................................................164

15.2.18 The Stack...............................................................................................................................................165

15.2.19 The Push ...............................................................................................................................................165

15.2.20 The Pop .................................................................................................................................................166

15.2.21 Stack Overflow.....................................................................................................................................166

15.2.22 Stack Underflow ..................................................................................................................................166

15.2.23 Returns..................................................................................................................................................166

15.3 Port Configuration Registers .............................................................................................................................167

15.3.1

Port A Registers ...................................................................................................................................167

15.3.1.1 TRIS_A – Data Direction Register......................................................................................167

15.3.1.2 LVL_A - TTL/CMOS Select Register ................................................................................167

15.3.1.3 PLP_A – Pull-Up Resistor Enable Register.......................................................................167

15.3.2

Port B Registers....................................................................................................................................168

15.3.2.1 TRIS_B – Data Direction Register ......................................................................................168

15.3.2.2 LVL_B - TTL/CMOS Select Register.................................................................................168

15.3.2.3 PLP_B – Pull-Up Resistor Enable Register .......................................................................168

15.3.2.4 ST_B – Schmitt-Trigger Enable Register ...........................................................................169

15.3.2.5 WKEN_B – Wake Up Enable Register...............................................................................169

15.3.2.6 WKED_B – Wake Up Edge Select Register.......................................................................169

15.3.2.7 WKPND_B – MIWU Pending Register .............................................................................169

15.3.2.8 CMP_B – Comparator Enable Register .............................................................................170

15.3.3

Port C Registers....................................................................................................................................170

15.3.3.1 TRIS_C – Data Direction Register......................................................................................170

15.3.3.2 LVL_C - TTL/CMOS Select Register.................................................................................170

15.3.3.3 PLP_C – Pull-Up Resistor Enable Register.......................................................................171

15.3.3.4 ST_C – Schmitt-Trigger Enable Register...........................................................................171

15.3.4

Port D and E Registers (SX48/52)......................................................................................................171

15.4 Control registers ..................................................................................................................................................171

15.4.1

Mode register (SX20/28).....................................................................................................................171

15.4.2

Mode register (SX48/52).....................................................................................................................173

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