AN3142 datasheet(35/44 Pages) STMICROELECTRONICS

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AN3142

L6563H: high voltage startup transition mode PFC

Doc ID 17005 Rev 3

35/44

current, minus the device’s consumption, charges the bypass capacitor connected from pin

Vcc (

6) to ground and makes its voltage rise almost linearly.

Figure 23.

Timing diagram: normal power-up and power-down sequences

As the Vcc voltage reaches the startup threshold (12V typ.) the low-voltage chip starts

operating and the HV generator is cut off by the Vcc_OK signal asserted high. The device is

that it is made with an auxiliary winding in the transformer of the cascaded DC-DC converter

and a steering diode) develops a voltage high enough to sustain the operation. The residual

consumption of this circuit is just the one on the 15 M resistor (10 mW at 400 Vdc), typically

50-70 times lower, under the same conditions, as compared to a standard startup circuit

made with external dropping resistors. At converter power-down the DC-DC converter loses

regulation as soon as the input voltage is so low that either peak current or maximum duty

cycle limitation is tripped. Vcc then drops and stops IC activity as it falls below the UVLO

threshold (9.5 V typ.). The Vcc_OK signal is de-asserted as the Vcc voltage goes below a

threshold VCCrestart located at about 6 V. The HV generator can now restart. However, if Vin <

VHVstart, HV_EN is de-asserted too and the HV generator is disabled. This prevents the

converter’s restart attempts and ensures monotonic output voltage decay at power-down in

systems where brownout protection (see the relevant section) is not used. If the device

detects a fault due to feedback failure the pin PWM_LATCH is asserted high (see

Feedback

failure protection section for more details) and, in order to keep alive this signal to be

provided to the DC-DC converter, the internal VCCrestart is brought up to over the VccOff (Turn-

off threshold).

Vcc

(pin 16)

HV_EN

VccON

VccOFF

Vccre sta rt

VHV

VHVstart

Icharge

0.85

Vcc_OK

Power-on

Power-off

Normal

Dc -dc l os es regulation here

Input s ource is rem ov ed here

Bulk c ap volt age

HV connect ed to

tifi d i

Rect ifi ed input v ol tage

HV connect ed to bulk c ap

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