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LM4560 Arkusz danych(PDF) 15 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Numer części LM4560
Szczegółowy opis  Advanced PCI Audio Accelerator
PDF  54 Pages
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Producent  NSC [National Semiconductor (TI)]
Strona internetowa  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM4560 Arkusz danych(HTML) 15 Page - National Semiconductor (TI)

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3.0 Register Description (Continued)
Bit7..0
X
Legacy FmMusic Bank 0 Register
Index
Read
Bit 7
1
FmMusic Timer Interrupt Flag (Equal
to Bit 6 + Bit 5)
Bit 6
1
FmMusic Timer 1 Overflowed Flag
Bit 5
1
FmMusic Timer2 Overflowed Flag
Bit 4..0
0
Reserved
Relative Internal Function Register File
In order to emulate the legacy FmMusic(YMF262 or OPL3)
function, a 512 bytes register file (RAM) must be imple-
mented. By legacy access method, this register file has two
banks and the bank index is specified by SBR0 and SBR2
respectively. This register file is byte-wide format, read/write
RAM which has no high speed operation requirement.
Relative Internal Functional Register Extracted From
Legacy FmMusic Bank 0 Register File
FmMusic-TIMER1
Bank Index: 02h
Size:
8 bits
Type:
Read/Write
Default:
00h
Bit 7..0
X
Timer1 Preset Value
If enabled, Timer1 counter will increase every 1024 AC97 bit-
clock (12.288 MHz). When overflow occurs, this value is re-
loaded into the counter.
FmMusic-TIMER2
Bank Index: 03h
Size:
8 bits
Type:
Read/Write
Default:
00h
Bit 7..0
X
Timer2 Preset Value
If enabled, Timer2 counter will increase every 4096 AC97 bit-
clock (12.288 MHz). When overflow occurs, this value is re-
loaded into the counter.
FmMusic-Timer-CONTROL
Bank Index: 04h
Size:
8 bits
Type:
Read/Write
Default:
00h
Bit 7
1
Reset Bit 7–5 of Legacy FmMusic
Status Register
Bit 6
1
Reset Timer1 Overflow Flag
Bit 5
1
Reset Timer2 Overflow Flag
Bit 4–2
0
Reserved
Bit 1
1
Enable Timer 2
Bit 0
1
Enable Timer 1
Bit 7–5 must be self-cleared to 0 after it is written as 1.
When bit 1 or 0 is set from 0 to 1, the corresponding timer
counter will load its preset value and start counting. When
these bits are zero, the respective timer counter will stop
counting. If bit 1 is set 1, bit 7 and 5 of FmMusic Status reg-
ister will be set 1 when timer2 is overflowed. If bit 0 is set 1,
bit 7 and 6 of FmMusic Status register will be set 1 when
timer1 is overflowed.
3.4.2.2 SBR1 (Legacy FmMusic Bank 0 Register Data
Port)
Address: AudioBase + 11h or SBBase + 1h or SBBase +
09h or ADLIBBase + 1h or AudioBase + 13h or
SBBase + 3h or ADLIBBase + 3h
Size:
8 bits
Type:
Read/Write
Default:
XXh
Bit 7..0
X
Legacy FmMusic Bank 0 Register
(indexed by SBR0) Data
When writing to this register, if SBR0 is B0h–B8h and bit 5 of
the content (indexed by SBR0) is changed from 0 to 1 or vice
versa, or SBR0 is BDh and any one of bit 4–0 of the content
(indexed by SBR0) is changed from 0 to 1 or vice versa, an
OPL3 Bank0 Key On/Off Dirty Flag will be set in the Audio
Status Registers ASR0 and AOPLSR0.
3.4.2.3 SBR2 (Legacy FmMusic Bank 1 Register Index)
Address: AudioBase + 12h || SBBase + 2h || ADLIBBase +
2h
Size:
8 bits
Type:
Read/Write
Default:
00h
Bit 7..0
X
Legacy FmMusic Bank 1 Register
Index
3.4.2.4 SBR3 (Legacy FmMusic Bank 1 Register Data
Port)
Address: AudioBase + 11h or SBBase + 1h or ADLIBBase
+ 1h or AudioBase + 13h or SBBase + 3h or
ADLIBBase + 3h
Size:
8 bits
Type:
Read/Write
Default:
XXh
Bit 7..0
X
Legacy FmMusic Bank 1 Register
(indexed by SBR2) Data
When write to this register, if SBR2 is B0h–B8h and bit 5 of
the content (indexed by SBR2) is changed from 0 to 1 or vice
versa, an OPL3 Bank1 Key On/Off Dirty Flag will be set in
Audio Status Registers ASR0 and AOPLSR0.
3.4.2.5 SBR4 (Legacy Sound Blaster Mixer Register
Index)
Address: AudioBase + 14h or SBBase + 4h
Size:
8 bits
Type:
Read/Write
Default:
00h
Bit 7..0
X
Legacy SB16 / SBPRO Mixer
Register Index
3.4.2.6 SBR5 (Legacy Sound Blaster Mixer Register
Data Port)
Address: AudioBase + 15h or SBBase + 5h
Size:
8 bits
Type:
Read/Write
Default:
XXh
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