UPD360 datasheet(28/221 Pages) MICROCHIP

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UPD360

DS00002084C-page 28

 2016-2017 Microchip Technology Inc.

Figure 6-1 illustrates the sequence of waking from SPI traffic.

6.2.3

SPI READ COMMAND (FAST READ)

The Fast Read command is supported by the SPI slave. A single byte, or multiple bytes, may be read in a single frame

(SPI_CS low).

Fast Read is the only form of Read access supported by the device. The instruction inputs the instruction code, the

address and a dummy byte on SPI_DI, and outputs the data one bit per clock on SPI_DO.

The SPI slave interface is selected by first bringing SPI_CS active. The 8-bit FASTREAD instruction, 0Bh, is input into

the SPI_DI pin, followed by the two address bytes and 1 dummy byte. The address bytes specify a Byte register address

within the device, and also specify how addresses are sequenced for successive bytes in a Multiple Byte Read (below).

The contents of the dummy byte are don’t-care.

On the falling clock edge following the rising edge of the last dummy bit, the SPI_DO pin is driven starting with the most

significant bit of the selected register byte. The remaining register bits are shifted out on subsequent falling clock edges.

The SPI_CS input is brought inactive to conclude the cycle. The SPI_DO pin is floated by the device in response.

6.2.3.1

Multiple Byte Reads

Additional byte reads beyond the first are performed by the Master by continuing the clock pulses while SPI_CS is active.

The upper two bits [15:14] (DIR subfield) of the address specify Auto-Incrementing (DIR=00b) or Auto-Decrementing

(DIR=10b) or Static (fixed) (DIR=11b) for successive bytes read. Maintaining a Static internal address is provided for

FIFO Read/Write or low-level register polling within a single frame, if the Master supports it.

Towards the end of the current one-byte output shift the address is incremented or decremented, if appropriate, and

another synchronized capture sequence is done.

FIGURE 6-1:

POWER MANAGEMENT WAKE ON SPI TRAFFIC

SPI_CLK

SPI_DI

SPI_DO

...

SPI_CS

(Ignored by Device)

...

Osc. Lock

(Internal)

...

(Ignored by Device)

asleep

awake

Wake

Trigger

Master sees Read data as all ‘0’ bits.

Instruction / Address

Read

Data

Recognized by Device

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