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UPD360 Arkusz danych(PDF) 73 Page - Microchip Technology |
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UPD360 Arkusz danych(HTML) 73 Page - Microchip Technology |
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73 / 221 page ![]() 2016-2017 Microchip Technology Inc. DS00002084C-page 73 UPD360 9.2.3 SOURCE DETACH DETECTION When configured as a source, the detachment of the partner UFP is determined by monitoring the appropriate CC pin (with the Rd pull-down) for a voltage exceeding DFP_UFP_DEF, DFP_UFP_1A5 or DFP_UFP_3A0, depending on the charging current advertised by the device. The following describes the steps that are taken to determine if a detach has occurred when operating in companion mode: APPLICATION NOTE: Software must not look at the CC detect status while a PD contract is in place, even though the Type-C spec permits doing so, in order to avoid false-disconnects in the Attached.SNK state during heavy PD message traffic. APPLICATION NOTE: Software should set a 3A advertisement while it's a source and a PD contract is in place in order to avoid false-disconnects in the Attached.SRC state during heavy PD message traffic; a 1.5A advertisement (even though permitted by the Type-C spec) is not sufficient to avoid this issue due to the lower vOPEN threshold. An exception to this recommendation is when “Collision Avoidance” is implemented. The following steps assume the CC debouncer has previously been used to detect attachment per the prior section. 1. Software accesses the device via I2C/SPI which wakes the device up and enables the 48 MHz oscillator. 2. Software programs the CCx Debounce Clear Enable Registers (CCx_DBCLR_EN) as required to enable per threshold debouncing. Typically this only involves disabling the thresholds not corresponding to vOPEN. 3. Software enables CC1_MATCH_CHG or CC2_MATCH_CHG interrupt via CC Interrupt Enable Register (CC_INT_EN). 4. Software enables IRQ_N via asserting the respective CC_INT bit in the Interrupt Enable Register (INT_EN). 5. Software programs the CC Comparator Control to sample appropriate CC pin. 6. The device samples the respective CC pin while operating off of 20 kHz clock. 7. Changes in state of the CC are reflected in the respective CCx Match Registers (CCx_MATCH) and CCx Change Status Registers (CCx_CHG_STS). 8. CC1_MATCH_CHG, or CC2_MATCH_CHG, interrupt asserts, CC_INT asserts which in turn asserts the IRQ_N pin. 9. Software implements a further debounce of the CC match for tCCDebounce in order to detect the detachment. 10. If VCONN is being supplied, than the VCONN FET shall be disabled in software by appropriately setting the VCONN1 Control or VCONN2 Control in the VBUS Control Register (VBUS_CTL). In this case, software must also discharge VCONN as defined in Section 9.7.1, "VCONN Discharge Programming Model". 11. Software disables the PPC which causes the internal 5V power switch to open if required. Power may have alter- natively been provided by external power source. 12. Internal 100 Ohm VBUS discharge switch is closed if required. 13. Discharge switch remains closed until vSafe0V threshold is crossed. 14. If vSafe0V threshold is not crossed within VBUS Off Register (VBUS_OFF) which asserts VBUS Discharge Error interrupt and asserts IRQ_N pin. 15. Internal discharge switch is opened. 16. The part is configured by software to detect a UFP attach. The 48 MHz oscillator is disabled. Only the keep-alive clock remains enabled. Note: Occurrence of VBUS Discharge Error interrupt indicates a potentially catastrophic system power issue. |
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