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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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UPD360 Arkusz danych(PDF) 92 Page - Microchip Technology |
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UPD360 Arkusz danych(HTML) 92 Page - Microchip Technology |
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92 / 221 page  UPD360 DS00002084C-page 92 2016-2017 Microchip Technology Inc. 9.12.8 DEBUG INTERRUPT STATUS REGISTER (DBG_INT_STS) 9.12.9 CC INTERRUPT ENABLE REGISTER (CC_INT_EN) Address: 080Bh Size: 8 bits Bits Description Type Default 7:4 RESERVED RO 0h 3 VCONN_DISCH_STS When set, indicates that the CC pin previously sourcing VCONN is being discharged. This bit only exists in standalone DFP mode and is otherwise reserved. R/WC 0b 2 VBUS_DISCH When set indicates this indicates that VBUS is being discharged. Note: The source of this input is a level and it persists until the discharge has completed. R/WC 0b 1 CFG_SEL1 Done When set, indicates that all CFG_SEL Threshold x Registers (CFG_SEL_THRx) have been measured in response to the request enabled by VBUS Comparator Control to sample the CFG_SEL1 pin and the results are readable in the respective CFG_SELx Match Registers (CFG_SELx_- MATCH) (UPD360-A/UPD360-B only). Note: The source of this input is a pulse and does not persist after being cleared. R/WC 0b 0 CFG_SEL0 Done When set, indicates that all CFG_SEL Threshold x Registers (CFG_SEL_THRx) have been measured in response to the request enabled by VBUS Comparator Control to sample the CFG_SEL0 pin and the results are readable in the respective CFG_SELx Match Registers (CFG_SELx_- MATCH). Note: The source of this input is a pulse and does not persist after being cleared. R/WC 0b Address: 0811h Size: 8 bits Bits Description Type Default 7:4 CC Interrupt Enable When “0”, prevents generation of the respective interrupt. R/W 0000b 3:2 RESERVED - 00b 1:0 CC Interrupt Enable When “0”, prevents generation of the respective interrupt. R/W 00b |
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