SC3200 datasheet(53/447 Pages) AMD

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AMD Geode™ SC3200 Processor Data Book

Signal Definitions

Revision 5.1

AL215

MD40

I/O

INT,

TS2/5

VIO

---

AL22

CKEA

O2/5

VIO

---

AL23

MA7

O2/5

VIO

---

AL24

MA4

O2/5

VIO

---

AL255

MD8

I/O

INT,

TS2/5

VIO

---

AL265

MD10

I/O

INT,

TS2/5

VIO

---

AL275

MD9

I/O

INT,

TS2/5

VIO

---

AL28

MA12

O2/5

VIO

---

Ball

No.

Signal Name

I/O

(PU/PD)

Buffer1

Type

Power

Rail

Configuration

AL295

MD23

I/O

INT,

TS2/5

VIO

---

AL30

VIO

PWR

---

AL31

VSS

GND

---

For Buffer Type definitions, refer to Table 9-10 "Buffer Types" on page

375.

Is 5V tolerant (ACK#, AFD#/DSTRB#, BUSY/WAIT#, ERR#, INIT#,

PD[7:0], PE, SLCT, SLIN#/ASTRB#, STB#/WRITE#, ONCTL#,

PWRCNT[2:1]).

The TFT_PRSNT strap determines the power-on reset (POR) state of

PMR[23].

The LPC_ROM strap determines the power-on reset (POR) state of

PMR[14] and PMR[22].

Is back-drive protected (MD[63:0], DPOS_PORT1, DNEG_PORT1,

DPOS_PORT2, DNEG_PORT2, DPOS_PORT3, DNEG_PORT3,

ACK#, AFD#/DSTRB#, BUSY/WAIT#, ERR#, INIT#, PD[7:0], PE,

SLCT, SLIN#/ASTRB#, STB#/WRITE#, ONCTL#, PWRCNT[2:1]).

Ball

No.

Signal Name

I/O

(PU/PD)

Buffer1

Type

Power

Rail

Configuration

Table 3-4.

481-TEPBGA Ball Assignment - Sorted by Ball Number (Continued)

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