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STM8S103F2 Arkusz danych(PDF) 70 Page - STMicroelectronics

Numer części STM8S103F2
Szczegółowy opis  Access line, 16 MHz STM8S 8-bit MCU, up to 8 Kbytes Flash, data EEPROM,10-bit ADC, 3 timers, UART, SPI, I²C
PDF  121 Pages
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Producent  STMICROELECTRONICS [STMicroelectronics]
Strona internetowa  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM8S103F2 Arkusz danych(HTML) 70 Page - STMicroelectronics

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Electrical characteristics
STM8S103F2 STM8S103F3 STM8S103K3
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DocID15441 Rev 14
10.3.6
I/O port pin characteristics
General characteristics
Subject to general operating conditions for VDD and TA unless otherwise specified. All
unused pins must be kept at a fixed voltage, using the output mode of the I/O for example or
an external pull-up or pull-down resistor.
Table 38. I/O static characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIL
Input low level voltage
VDD = 5 V
-0.3 V
-
0.3 x VDD
V
VIH
Input high level voltage
0.7 x VDD
-VDD + 0.3 V
Vhys
Hysteresis(1)
-700
-
mV
Rpu
Pull-up resistor
VDD = 5 V, VIN = VSS
30
55
80
k
Ω
tR, tF
Rise and fall time
(10% - 90%)
Fast I/Os
Load = 50 pF
--
35(2)
ns
Standard and high sink I/Os
Load = 50 pF
--
125(2)
tR, tF
Rise and fall time
(10% - 90%)
Fast I/Os
Load = 20 pF
--
20(2)
ns
Standard and high sink I/Os
Load = 20 pF
--
50(2)
Ilkg
Digital input leakage
current
VSS ≤VIN ≤VDD
--
±1(3)
µA
Ilkg ana
Analog input leakage
current
VSS ≤ VIN ≤ VDD
--
±250(3)
nA
Ilkg(inj)
Leakage current in
adjacent I/O
Injection current ±4 mA
-
-
±1(3)
µA
1. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested in production.
2. Data guaranteed by design.
3. Guaranteed by characterization results



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