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STM8S103F2 Arkusz danych(PDF) 77 Page - STMicroelectronics |
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STM8S103F2 Arkusz danych(HTML) 77 Page - STMicroelectronics |
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77 / 121 page ![]() DocID15441 Rev 14 77/121 STM8S103F2 STM8S103F3 STM8S103K3 Electrical characteristics 88 Figure 38. Recommended reset pin protection 10.3.8 SPI serial peripheral interface Unless otherwise specified, the parameters given in Table 43 are derived from tests performed under ambient temperature, fMASTER frequency and VDD supply voltage conditions. tMASTER = 1/fMASTER. Refer to I/O port characteristics for more details on the input/output alternate function characteristics (NSS, SCK, MOSI, MISO). Table 43. SPI characteristics Symbol Parameter Conditions(1) Min Max Unit fSCK 1/tc(SCK) SPI clock frequency Master mode 0 8 MHz Slave mode 0 7 |
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