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STM8S103F2 Arkusz danych(PDF) 81 Page - STMicroelectronics

Numer części STM8S103F2
Szczegółowy opis  Access line, 16 MHz STM8S 8-bit MCU, up to 8 Kbytes Flash, data EEPROM,10-bit ADC, 3 timers, UART, SPI, I²C
PDF  121 Pages
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Producent  STMICROELECTRONICS [STMicroelectronics]
Strona internetowa  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM8S103F2 Arkusz danych(HTML) 81 Page - STMicroelectronics

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STM8S103F2 STM8S103F3 STM8S103K3
Electrical characteristics
88
10.3.9
I2C interface characteristics
Figure 42. Typical application with I2C bus and timing diagram
Table 44. I2C characteristics
Symbol
Parameter
Standard mode I2CFast mode I2C(1)
1. fMASTER, must be at least 8 MHz to achieve max fast I2C speed (400 kHz)
Unit
Min(2)
2. Data based on standard I2C protocol requirement, not tested in production
Max(2)
Min(2)
Max(2)
tw(SCLL)
SCL clock low time
4.7
-
1.3
-
µs
tw(SCLH)
SCL clock high time
4.0
-
0.6
-
tsu(SDA)
SDA setup time
250
-
100
-
ns
th(SDA)
SDA data hold time
0(3)
3. The maximum hold time of the start condition has only to be met if the interface does not stretch the low
time
-
0(4)
4. The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge the
undefined region of the falling edge of SCL
900(3)
tr(SDA)
tr(SCL)
SDA and SCL rise time
(VDD = 3 to 5.5 V)
-
1000
-
300
tf(SDA)
tf(SCL)
SDA and SCL fall time
(VDD = 3 to 5.5 V)
-
300
-
300
th(STA)
START condition hold time
4.0
-
0.6
-
µs
tsu(STA)
Repeated START condition setup time
4.7
-
0.6
-
tsu(STO)
STOP condition setup time
4.0
-
0.6
-
tw(STO:STA)
STOP to START condition time
(bus free)
4.7
-
1.3
-
Cb
Capacitive load for each bus line
-
400
-
400
pF



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