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IMX8MPCEC Arkusz danych(PDF) 14 Page - NXP Semiconductors |
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IMX8MPCEC Arkusz danych(HTML) 14 Page - NXP Semiconductors |
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14 / 111 page ![]() i.MX 8M Plus Applications Processor Datasheet for Consumer Products, Rev. 0, 03/2021 14 NXP Semiconductors Modules list 2.1 Unused input and output guidance If a function of the i.MX 8M Plus is not used, the I/Os and power rails of that function can be terminated to reduce overall board power. Table 5 is recommended connectivities for LVDS, PCIe, HDMI, eARC, and other digital I/Os. Table 6 is recommended connectivities for MIPI. Table 7 is recommended connectivities for USB. UART1 UART2 UART3 UART4 UART Interface Each of the UARTv2 modules supports the following serial data transmit/receive protocols and configurations: • 7- or 8-bit data words, 1 or 2 stop bits, programmable parity (even, odd, or none) • Programmable baud rates up to 4 Mbps. This is a higher max baud rate relative to the 1.875 MHz, which is stated by the TIA/EIA-232-F standard. • 32-byte FIFO on Tx and 32 half-word FIFO on Rx supporting auto-baud uSDHC1 uSDHC2 uSDHC3 SD/MMC and SDXC Enhanced Multi-Media Card / Secure Digital Host Controller i.MX 8M Plus SoC characteristics: All the MMC/SD/SDIO controller IPs are based on the uSDHC IP. They are designed to support: • SD/SDIO standard, up to version 3.0. • MMC standard, up to version 5.1. • 1.8 V and 3.3 V operation, but do not support 1.2 V operation. • 1-bit/4-bit SD and SDIO modes, 1-bit/4-bit/8-bit MMC mode. USB 3.0 2x USB 3.0 controllers and PHYs Two USB controllers and PHYs that support USB 3.0. Each USB instance contains: • USB 3.0 core, which can operate in 2.0 mode VPU Video Processing Unit A high performing video processing unit (VPU), which covers many SD-level and HD-level video decoders. See the i.MX 8M Plus Applications Processor Reference Manual (IMX8MPRM) for a complete list of the VPU’s decoding and encoding capabilities. WDOG1 WDOG2 WDOG3 Watchdog The watchdog (WDOG) timer supports two comparison points during each counting period. Each of the comparison points is configurable to evoke an interrupt to the Arm core, and a second point evokes an external event on the WDOG line. XTALOSC Crystal Oscillator interface The XTALOSC module enables connectivity to an external crystal oscillator device. In a typical application use case, it is used for a 24 MHz oscillator. Table 5. Unused function strapping recommendations Function Ball name Recommendations if Unused LVDS VDD_LVDS_1P8, LVDS1_CLK_P, LVDS1_CLK_N, LVDS1_Dx_P, LVDS1_Dx_N, LVDS2_CLK_P, LVDS2_CLK_N, LVDS2_Dx_P, LVDS2_Dx_N, Not connected PCIe VDD_PCI_1P8, VDD_PCI_0P8, PCIE_TXN_P, PCIE_TXN_N, PCIE_RXN_P, PCIE_RXN_N, PCIE_REF_PAD_CLK_P, PCIE_REF_PAD_CLK_N, PCIE_RESREF Not connected Table 4. i.MX 8M Plus modules list (continued) Block mnemonic Block name Brief description |
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