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PIC12F683 Arkusz danych(PDF) 131 Page - Microchip Technology |
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PIC12F683 Arkusz danych(HTML) 131 Page - Microchip Technology |
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131 / 148 page ![]() 2004 Microchip Technology Inc. Preliminary DS41211B-page 129 PIC12F683 FIGURE 15-10: PIC12F683 A/D CONVERSION TIMING (SLEEP MODE) TABLE 15-11: PIC12F683 A/D CONVERSION REQUIREMENTS (SLEEP MODE) Standard Operating Conditions (unless otherwise stated) Operating temperature -40°C ≤ TA ≤ +125°C Param No. Sym Characteristic Min Typ† Max Units Conditions 130 TAD A/D Internal RC Oscillator Period 3.0* 6.0 9.0* µs ADCS<1:0> = 11 (RC mode) At VDD = 2.5V 2.0* 4.0 6.0* µsAt VDD = 5.0V 131 Tcnv Conversion Time (not including Acquisition Time)(1) —11 — TAD 132 TACQ Acquisition Time (2) 5* 11.5 — — — µs µs The minimum time is the amplifier settling time. This may be used if the “new” input voltage has not changed by more than 1 LSb (i.e., 4.1 mV @ 4.096V) from the last sampled voltage (as stored on CHOLD). 134 TGO Q4 to A/D Clock Start —TOSC/2 + TCY — — If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the SLEEP instruction to be executed. * These parameters are characterized but not tested. † Data in ‘Typ’ column is at 5.0V, 25 °C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: ADRES register may be read on the following TCY cycle. 2: See Table 9-1 for minimum conditions. 131 130 BSF ADCON0, GO Q4 A/D CLK A/D Data ADRES ADIF GO Sample OLD_DATA DONE NEW_DATA 9 7 32 10 Note 1: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the SLEEP instruction to be executed. 134 6 8 132 1 TCY (TOSC/2 + TCY)(1) 1 TCY Sampling Stopped |
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