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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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PIC12F615 Arkusz danych(PDF) 13 Page - Microchip Technology |
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PIC12F615 Arkusz danych(HTML) 13 Page - Microchip Technology |
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13 / 168 page  © 2006 Microchip Technology Inc. Preliminary DS41302A-page 11 PIC12F609/615/12HV609/615 TABLE 2-1: PIC12F609/HV609 SPECIAL FUNCTION REGISTERS SUMMARY BANK 0 Addr Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR, BOR Page Bank 0 00h INDF Addressing this location uses contents of FSR to address data memory (not a physical register) xxxx xxxx 22, 100 01h TMR0 Timer0 Module’s Register xxxx xxxx 41, 100 02h PCL Program Counter’s (PC) Least Significant Byte 0000 0000 22, 100 03h STATUS IRP(1) RP1(1) RP0 TO PD ZDC C 0001 1xxx 15, 100 04h FSR Indirect Data Memory Address Pointer xxxx xxxx 22, 100 05h GPIO — — GP5 GP4 GP3 GP2 GP1 GP0 --x0 x000 31, 100 06h — Unimplemented — — 07h — Unimplemented — — 08h — Unimplemented — — 09h — Unimplemented — — 0Ah PCLATH — — — Write Buffer for upper 5 bits of Program Counter ---0 0000 22, 100 0Bh INTCON GIE PEIE T0IE INTE GPIE T0IF INTF GPIF 0000 0000 17, 100 0Ch PIR1 — — — —CMIF — —TMR1IF ---- 0--0 19, 100 0Dh — Unimplemented — — 0Eh TMR1L Holding Register for the Least Significant Byte of the 16-bit TMR1 Register xxxx xxxx 45, 100 0Fh TMR1H Holding Register for the Most Significant Byte of the 16-bit TMR1 Register xxxx xxxx 45, 100 10h T1CON T1GINV TMR1GE T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON 0000 0000 49, 100 11h — Unimplemented — — 12h — Unimplemented — — 13h — Unimplemented — — 14h — Unimplemented — — 15h — Unimplemented — — 16h — Unimplemented — — 17h — Unimplemented — — 18h — Unimplemented — — 19h VRCON CMVREN — VRR FVREN VR3 VR2 VR1 VR0 0-00 0000 62, 101 1Ah CMCON0 CMON COUT CMOE CMPOL —CMR —CMCH 0000 -0-0 58, 101 1Bh — — — — — 1Ch CMCON1 — — — T1ACS CMHYS — T1GSS CMSYNC ---0 0-10 59, 101 1Dh — Unimplemented — — 1Eh — Unimplemented — — 1Fh — Unimplemented — — Legend: – = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented Note 1: IRP and RP1 bits are reserved, always maintain these bits clear. |
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