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T48C862-R8 Arkusz danych(PDF) 84 Page - ATMEL Corporation |
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T48C862-R8 Arkusz danych(HTML) 84 Page - ATMEL Corporation |
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84 / 107 page ![]() 84 T48C862-R8 4590B–4BMCU–02/03 Before activating the demodulator mode the timer and the demodulator stage must be synchronized with the bitstream. The Manchester code timing consists of parts with the half bitlength and the complete bitlength. A synchronization routine must start the demodulator after an interval with the complete bitlength. The counter can be driven by any internal clock source. The output T3O can be used by Timer 2 in this mode. The Manchester decoder can also be used for pulse-width demod- ulation. The input must programmed to detect the positive edge. The demodulator and timer must be synchronized with the leading edge of the pulse. After that a counter match with the compare register 1 shifts the state at the input T3I into the shift register. The next positive edge at the input restarts the timer. Figure 81. Manchester Demodulation Combination Mode 9: Biphase Demodulation SSI mode 1: 8-bit shift register internal data input (SI) and the internal shift clock (SCI) from the Timer 3 Timer 3 mode 11: Biphase demodulation with Timer 3 In the Biphase demodulation mode the timer works like in the Manchester demodulation mode. The difference is that the bits are decoded with the toggle flip-flop. This flip-flop samples the edge in the middle of the bitframe and the compare register 1 match event shifts the toggle flip-flop output into shift register. Before activating the demodulation the timer and the demodulation stage must be synchronized with the bitstream. The Biphase code timing consists of parts with the half bitlength and the complete bitlength. The synchronization routine must start the demodulator after an interval with the com- plete bitlength. The counter can be driven by any internal clock source and the output T3O can be used by Timer 2 in this mode. 1 011 1 0 0 1 1 0 11 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Synchronize Manchester demodulation mode Timer 3 mode T3EX SI SR-DATA T3I CM31=SCI 100 11 0 Bit 0 |
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