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STM32H533CE Arkusz danych(PDF) 98 Page - STMicroelectronics

Numer części STM32H533CE
Szczegółowy opis  Arm® Cortex®-M33 32-bit MCUTrustZone® FPU, 375 DMIPS 250 MHz, 512-Kbyte flash, 272-Kbyte RAM, cryptography
PDF  231 Pages
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Producent  STMICROELECTRONICS [STMicroelectronics]
Strona internetowa  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32H533CE Arkusz danych(HTML) 98 Page - STMicroelectronics

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Electrical characteristics
STM32H533xx
98/231
DS14539 Rev 1
pins on the underside of the PCB to ensure the good functionality of the device. It is not
recommended to remove filtering capacitors to reduce PCB size or cost. This might cause
incorrect operation of the device.
5.2
Absolute maximum ratings
Stresses above the absolute maximum ratings listed in Table 17, Table 18, and Table 19
may cause permanent damage to the device. These are stress ratings only and the
functional operation of the device at these conditions is not implied. Exposure to maximum
rating conditions for extended periods may affect device reliability. Device mission profile
(application conditions) is compliant with JEDEC JESD47 Qualification Standard, extended
mission profiles are available on demand.
Table 17. Voltage characteristics(1)
Symbol
Ratings
Min
Max
Unit
VDDx - VSS
External main supply voltage (including VDDA,
VDDUSB, VDDIO2(2)(3)(4), VBAT, and VREF+)
-0.3
4.0
V
VDDIOx(4) -
VSS
I/O supply when HSLV(2) = 0
-0.3
4.0
V
I/O supply when HSLV(2) = 1
-0.3
2.75
VIN(5)
Input voltage on FT_xxx pins except FT_c pins VSS - 0.3
min (min(VDD, VDDA, VDDUSB,
VDDIO2) + 4.0, 6.0 V)(6)(7)
V
Input voltage on FT_t in VBAT mode
VSS - 0.3
min (min(VBAT, VDDA, VDDUSB,
VDDIO2) + 4.0V, 6.0 V)
V
Input voltage on TT_xx pins
VSS - 0.3
4.0
Input voltage on BOOT0 pin
VSS
min (min(VDD, VDDA, VDDUSB,
VDDIO2) + 4.0, 6.0 V)(6)
Input voltage on FT_c pins
VSS - 0.3
5.5
Input voltage on any other pins
VSS - 0.3
4.0
VREF+-VDDA Allowed voltage difference for VREF+ > VDDA
-0.4
|∆VDDx|
Variations between different VDDX power pins
of the same domain
-50.0
mV
|VSSx-VSS|
Variations between all the different ground pins
-
50.0
1. All main power (VDD, VDDAVDDUSB, VDDIO2, VREF+, VBAT) and ground (VSS, VSSA) pins must always be connected to the
external power supply, in the permitted range.
2. HSLV = High-speed low-voltage mode. Refer to General-purpose I/Os (GPIO) section of RM0481.
3. If HSLV = 0.
4. VDDIO1 or VDDIO2. VDDIO1 = VDD.
5. VIN maximum must always be respected. Refer to the maximum allowed injected current values.
6. To sustain a voltage higher than 4 V the internal pull-up/pull-down resistors must be disabled.
7. This formula must be applied on power supplies related to the I/O structure described by the pin definition table.



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