AT89LP428 datasheet(102/149 Pages) ATMEL

102 / 149 page

102

3654A–MICRO–8/09

AT89LP428/828

Notes:1. CONA must be cleared to 0 before changing CSA [1 - 0].

2. Debouncing modes require the use of Timer 1 to generate the sampling delay.

Table 18-1.

ACSRA

– Analog Comparator a Control and Status Register

ACSRA = 97H

Reset Value = 0000 0000B

Not Bit Addressable

CSA1

CSA0

CONA

CFA

CENA

CMA2

CMA1

CMA0

Bit

543

Symbol

Function

CSA

[1 - 0]

Comparator A Positive Input Channel Select(1)

CSA1

CSA0

A+ Channel

AIN0 (P2.4)

AIN1 (P2.5)

AIN2 (P2.6)

AIN3 (P2.7)

CONA

Comparator A Input Connect. When CONA = 1 the analog input pins are connected to the comparator. When CONA = 0

the analog input pins are disconnected from the comparator. CONA must be cleared to 0 before changing CSA [1 - 0] or

RFA [1 - 0].

CFA

Comparator A Interrupt Flag. Set when the comparator output meets the conditions specified by the CMA [2 - 0] bits and

CENA is set. The flag must be cleared by software. The interrupt may be enabled/disabled by setting/clearing bit 6 of IE.

CENA

Comparator A Enable. Set this bit to enable the comparator. Clearing this bit will force the comparator output low and

prevent further events from setting CFA. When CENA = 1 the analog input pins, P2.4 - P2.7, have their digital inputs

disabled if they are configured in input-only mode.

CMA

[2 - 0]

Comparator Interrupt Mode

CMA2

CMA1

CMA0

Interrupt Mode

000

Negative (Low) level

001

Positive edge

Toggle with debouncing(2)

011

Positive edge with debouncing(2)

100

Negative edge

101

Toggle

110

Negative edge with debouncing(2)

111

Positive (High) level

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