AT89LP428 datasheet(38/149 Pages) ATMEL

38 / 149 page

3654A–MICRO–8/09

AT89LP428/828

10.1.4

Push-pull Output

The push-pull output configuration has the same pull-down structure as both the open-drain and

the quasi-bidirectional output modes, but provides a continuous strong pull-up when the port

latch contains a logic “1”. The push-pull mode may be used when more source current is needed

from a port output. The push-pull port configuration is shown in Figure 10-5.

Figure 10-5. Push-pull Output

10.2

Port 2 Analog Functions

The AT89LP428/828 incorporates two analog comparators. In order to give the best analog per-

formance and minimize power consumption, pins that are being used for analog functions must

have both their digital outputs and inputs disabled. Digital outputs are disabled by putting the

port pins into the input-only mode as described in “Port Configuration” on page 35. Digital inputs

on P2.4, P2.5, P2.6 and P2.7 are disabled whenever an analog comparator is enabled by setting

the CENA or CENB bits in ACSRA and ACSRB and that pin is configured for input-only mode.

To use an analog input pin as a high-impedance digital input while a comparator is enabled, that

pin should be configured in open-drain mode and the corresponding port register bit should be

set to 1. The analog input pins will always default to input-only mode after reset regardless of the

state of the Tristate-Port User Fuse.

If analog noise immunity is a concern, the P2.4–7 pins should not be used as high speed digital

inputs or outputs while the comparators are enabled.

Port

VCC

From Port

Input

Data

PWD

AT89LP428 Arkusz danych(PDF) 38 Page - ATMEL Corporation