AT89LP428 datasheet(27/149 Pages) ATMEL

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3654A–MICRO–8/09

AT89LP428/828

8.2

Power-down Mode

Setting the Power-down (PD) bit in PCON enters Power-down mode. Power-down mode stops

the oscillator, disables the BOD and powers down the Flash memory in order to minimize power

consumption. Only the power-on circuitry will continue to draw power during Power-down. Dur-

ing Power-down, the power supply voltage may be reduced to the RAM keep-alive voltage. The

RAM contents will be retained, but the SFR contents are not guaranteed once V

CC has been

reduced. Power-down may be exited by external reset, power-on reset, or certain enabled

interrupts.

8.2.1

Interrupt Recovery from Power-down

Three external interrupt sources may be configured to terminate Power-down mode: external

interrupts INT0 (P3.2) and INT1 (P3.3); and the GPI. To wake up by external interrupt INT0 or

INT1, that interrupt must be enabled by setting EX0 or EX1 in IE and must be configured for

level-sensitive operation by clearing IT0 or IT1. Any GPI on Port 1 (GPI

7-0) can also wake up the

device. The GPI pin must be enabled in GPIEN and configured for level-sensitive detection, and

EGP in IE2 must be set in order to terminate Power-down.

When terminating Power-down by an interrupt, two different wake-up modes are available.

When PWDEX in PCON is zero, the wake-up period is internally timed as shown in Figure 8-1.

At the falling edge on the interrupt pin, Power-down is exited, the oscillator is restarted, and an

internal timer begins counting. The internal clock will not be allowed to propagate to the CPU

until after the timer has timed out. After the time-out period, the interrupt service routine will

begin. The time-out period is controlled by the Start-up Timer Fuses (see Table 7-1 on page 25).

The interrupt pin need not remain low for the entire time-out period.

Figure 8-1.

Interrupt Recovery from Power-down (PWDEX = 0)

When PWDEX = “1”, the wake-up period is controlled externally by the interrupt. Again, at

the falling edge on the interrupt pin, power-down is exited and the oscillator is restarted. How-

ever, the internal clock will not propagate until the rising edge of the interrupt pin as shown in

Figure 8-2. The interrupt pin should be held low long enough for the selected clock source to sta-

bilize. After the rising edge on the pin the interrupt service routine will be executed.

PWD

INT1

XTAL1

tSUT

Internal

Clock

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