TS1005 datasheet(10/11 Pages) TOUCHSTONE

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TS1005

Page 10

TS1005DS r1p0

RTFDS

Configuring the TS1005 as Microwatt Analog

Comparator

Although optimized for use as an operational

amplifier, the TS1005 can also be used as a rail-to-

rail I/O comparator as illustrated in Figure 7.

External hysteresis can be employed to minimize the

risk of output oscillation. The positive feedback

circuit causes the input threshold to change when

the output voltage changes state. The diagram in

Figure 8 illustrates the TS1005’s analog comparator

hysteresis band and output transfer characteristic.

The design of an analog comparator using the

TS1005 is straightforward. In this application, a 3.0V

power supply (VDD) was used and the resistor divider

network formed by RD1 and RD2 generated a

convenient reference voltage (VREF) for the circuit at

½ the supply voltage, or 1.5V, while keeping the

current drawn by this resistor divider low. Capacitor

C1 is used to filter any extraneous noise that could

couple into the TS1005’s inverting input.

In this application, the desired hysteresis band was

set to 100mV (VHYB) with a desired high trip-point

(VHI) set at 1V and a desired low trip-point (VLO) set

at 0.9V.

Since the TS1005 is a low supply current amplifier

(1.3µA, typical), it is desired that the design of an

analog comparator using the TS1005 should also

use as little current as practical. The first step in the

design, therefore, was to set the feedback resistor

R3:

R3 = 10MΩ

Calculating a value for R1 is given by the following

expression:

R1 = R3 x (VHYB/VDD)

Substituting VHYB = 100mV, VDD = 3.0V, and R3 =

10MΩ into the equation above yields:

R1 = 333kΩ

The following expression was then used to calculate

a value for R2:

R2 = 1/[VHI/(VREF x R1) – (1/R1) – (1/R3)]

Substituting VHI = 1V, VREF = 1.5V, R1 = 333kΩ, and

R3 = 10MΩ into the above expression yields:

R2 = 909kΩ

Printed Circuit Board Layout Considerations

Even though the TS1005 operates from a single

0.8V to 5.5V power supply and consumes very little

supply current, it is always good engineering

practice to bypass the power supplies with a 0.1μF

ceramic capacitor placed in close proximity to the

VDD and VSS (or GND) pins.

Good pcb layout techniques and analog ground

plane management improve the performance of any

analog circuit by decreasing the amount of stray

capacitance that could be introduced at the op amp's

inputs and outputs. Excess stray capacitance can

easily couple noise into the input leads of the op

amp and excess stray capacitance at the output will

add to any external capacitive load. Therefore, PC

board trace lengths and external component leads

should be kept a short as practical to any of the

TS1005’s package pins. Second, it is also good

engineering practice to route/remove any analog

ground plane from the inputs and the output pins of

the TS1005.

Figure 8: Analog Comparator Hysteresis Band and Output

Switching Points.

Figure 7: A MicroWatt Analog Comparator with User-

Programmable Hysteresis.

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