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TMS320VC33 Arkusz danych(PDF) 45 Page - Texas Instruments

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Numer części TMS320VC33
Szczegółowy opis  DIGITAL SIGNAL PROCESSOR
PDF  58 Pages
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Producent  TI [Texas Instruments]
Strona internetowa  http://www.ti.com
Logo TI - Texas Instruments

TMS320VC33 Arkusz danych(HTML) 45 Page - Texas Instruments

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TMS320VC33
DIGITAL SIGNAL PROCESSOR
SPRS087E -- FEBRUARY 1999 -- REVISED JANUARY 2004
45
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251--1443
serial-port timing parameters
The following tables define the timing parameters for the serial port.
timing requirements (see Figure 31 and Figure 32)
MIN
MAX
UNIT
t
Cycle time CLKX/R
CLKX/R ext
tc(H) *2.6
ns
tc(SCK)
Cycle time, CLKX/R
CLKX/R int
tc(H) *2
tc(H) *216
ns
t
Pulse duration CLKX/R high/low
CLKX/R ext
tc(H) +5
ns
tw(SCK)
Pulse duration, CLKX/Rhigh/low
CLKX/R int
[tc(SCK)/2] -- 4
[tc(SCK)/2] + 4
ns
tr(SCK)
Rise time, CLKX/R
3
ns
tf(SCK)
Fall time, CLKX/R
3
ns
t
Setup time DR before CLKR low
CLKR ext
4
ns
tsu(DR-CLKRL)
Setup time, DR before CLKR low
CLKR int
5
ns
t
Hold time DR after CLKR low
CLKR ext
3
ns
th(CLKRL-DR)
Hold time, DR after CLKR low
CLKR int
0
ns
t
Setup time FSR before CLKR low
CLKR ext
4
ns
tsu(FSR-CLKRL)
Setup time, FSR before CLKR low
CLKR int
5
ns
t
Hold time FSX/R input after CLKX/R low
CLKX/R ext
3
ns
th(SCKL-FS)
Hold time, FSX/R input after CLKX/Rlow
CLKX/R int
0
ns
t
Setup time external FSX before CLKX
CLKX ext
--[tc(H) -- 6]
[tc(SCK)/2] -- 6
ns
tsu(FSX-CLKX)
Setup time, external FSX before CLKX
CLKX int
--[tc(H) -- 10]
tc(SCK)/2
ns
switching characteristics over recommended operating conditions (see Figure 31 and Figure 32)
PARAMETER
MIN
MAX
UNIT
td(H1H-SCK)
Delay time, H1 high to internal CLKX/R
4
ns
t
Delay time CLKX to DX valid
CLKX ext
6
ns
td(CLKX-DX)
Delay time, CLKX to DX valid
CLKX int
5
ns
t
Delay time CLKX to internal FSX high/low
CLKX ext
5
ns
td(CLKX-FSX)
Delay time, CLKX to internal FSX high/low
CLKX int
4
ns
t
Delay time CLKX to first DX bit FSX precedes CLKX high
CLKX ext
5
ns
td(CLKX-DX)V
Delay time, CLKX to first DX bit, FSX precedes CLKX high
CLKX int
4
ns
td(FSX-DX)V
Delay time, FSX to first DX bit, CLKX precedes FSX
6
ns
tdis(CLKX-DXZ)
Disable time, DX high impedance following last data bit from CLKX high
6
ns



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