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ADV7341 Arkusz danych(PDF) 17 Page - Analog Devices

Numer części ADV7341
Szczegółowy opis  Multiformat Video Encoder, Six 12-Bit Noise Shaped Video DACS
PDF  108 Pages
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

ADV7341 Arkusz danych(HTML) 17 Page - Analog Devices

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Data Sheet
ADV7340/ADV7341
Rev. C | Page 17 of 108
Figure 13. ED Only (at 54 MHz), 8-/10-Bit, 4:2:2 YCrCb (EAV/SAV) Pixel Input Mode (Input Mode 111)
Figure 14. ED-SDR, 16-/20-Bit, 4:2:2 YCrCb (HSYNC/VSYNC) Input Timing Diagram
t9
t11
t10
t12
t13
t14
CLKIN_A
Y9 TO Y2/
Y9 TO Y0
CONTROL
OUTPUTS
3FF
00
00
XY
Cb0
Y0
Cr0
Y1
Y0
Y1
Y2
Y3
b
a
Cr2
Cb2
Cr0
Cb0
c
Y OUTPUT
P_HSYNC
P_VSYNC
P_BLANK
Y9 TO Y2/
Y9 TO Y0
C9 TO C2/
C9 TO C0
a AND b AS PER RELEVANT STANDARD.
c = PIPELINE DELAY. PLEASE REFER TO RELEVANT PIPELINE DELAY. THIS CAN BE FOUND IN THE DIGITAL TIMING
SPECIFICATION SECTION OF THE DATA SHEET.
A FALLING EDGE OF HSYNC INTO THE ENCODER GENERATES A SYNC FALLING EDGE ON THE OUTPUT AFTER A TIME
EQUAL TO THE PIPELINE DELAY.



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