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ADV7341 Arkusz danych(PDF) 18 Page - Analog Devices

Numer części ADV7341
Szczegółowy opis  Multiformat Video Encoder, Six 12-Bit Noise Shaped Video DACS
PDF  108 Pages
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

ADV7341 Arkusz danych(HTML) 18 Page - Analog Devices

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ADV7340/ADV7341
Data Sheet
Rev. C | Page 18 of 108
Figure 15. ED-DDR, 8-/10-Bit, 4:2:2 YCrCb (HSYNC/VSYNC) Input Timing Diagram
Y9 TO Y2/
Y9 TO Y0
Cb0
Y0
Cr0
Y1
b
a
a = 32 CLKCYCLES FOR 525p
a = 24 CLKCYCLES FOR 625p
AS RECOMMENDED BY STANDARD
b(MIN) = 244 CLKCYCLES FOR 525p
b(MIN) = 264 CLKCYCLES FOR 625p
P_HSYNC
P_VSYNC
P_BLANK
c
Y OUTPUT
c = PIPELINE DELAY. PLEASE REFER TO RELEVANT PIPELINE DELAY. THIS CAN BE FOUND IN THE DIGITAL TIMING
SPECIFICATION SECTION OF THE DATA SHEET.
A FALLING EDGE OF HSYNC INTO THE ENCODER GENERATES A SYNC FALLING EDGE ON THE OUTPUT AFTER A TIME
EQUAL TO THE PIPELINE DELAY.



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