DATA SHEET • SKY73208-11: MIXER WITH PLL AND VCO

Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com

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November 5, 2015 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201317F

The R_DIV register stores the value of the 11-bit R-divider that

according to the following equation:

COMP

REF

F

F

R



(3)

The N_DIV1 and N_DIV2 registers store the value of the N-divider

according to the following equation:

R

F

F

N

REF

VCO





(4)

Bits[1:0] of the N_DIV2 register are the most significant bits

(MSBs) of the 18-bit representation of the N number.

Bits[15:0] of the N_DIV1 register are the LSBs of the 18-bit binary

representation of the N number.

The calculated R-divider and N-divider values are programmed

into the SKY73208-11 using the SPI interface.

Additional programming information is provided in the document,

Skyworks Wideband, Integer-N Phase-Locked Loop Programming

Guide, document number 201322.

Example:

A desired RF output frequency of 1800 MHz is required using a

reference frequency of 76.8 MHz and a desired frequency step

size of 400 kHz. If the VCO divider is equal to 2, the VCO

frequency is 3600 MHz from Equation 1 and the comparison

frequency is equal to 800 kHz from Equation 2.

From Equations 3 and 4, the R and N values become:

R = 96 = 1100000b

N = 4500 = 1000110010100b

These values would be programmed through the SPI interface.

Figure 5 represents the bits of the R_DIV register with the value of

R = 96. Figures 6 and 7 represent the bits of the N_DIV1 and

N_DIV2 registers, respectively, with the value of N = 4500.

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

54

3

2

1

0

0

0

1x

x

x0

x0

00

1

10

0

00

0

x

0

01

1

0

0

11-Bit R-Divider Value

4-Bit Device

Address

5-Bit Register

Address

S1847b

Note: Value of bits [15:11] can vary. Refer to the Skyworks Wideband, Integer-N Phase-Locked Loop Programming Guide, document number 201322.

Figure 5. R_DIV Register Showing an R-Divider Value of 96

LSBs of 18-Bit

N-Divider Value

S1849b

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

54

3

2

1

0

0

1

01

0

00

01

01

0

01

1

00

0

0

0

01

1

0

0

4-Bit Device

Address

5-Bit Register

Address

Figure 6. N_DIV1 Register Showing an N-Divider Value of 4500 (LSBs)