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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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DA7210 Arkusz danych(PDF) 111 Page - Renesas Technology Corp |
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DA7210 Arkusz danych(HTML) 111 Page - Renesas Technology Corp |
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111 / 119 page  DA7210 Ultra-low power stereo codec Datasheet Revision 3.2 23-Dec-2021 CFR0011-120-00 Rev 5 111 of 118 © 2021 Renesas Electronics Table 183: A_DAC0 0x96 Unlocking registers 0x8A and 0x8B is required to access this register Bit Mode Symbol Description Reset 7:3 W Reserved Reserved 00000 2:0 W VMID_BUFF_EN VMID buffer disable during ADC and analogue only modes to save power 000 = VMID buffer disabled 111 = VMID buffer enabled 111 Table 184: A_CPHP6 0xA2 Unlocking registers 0x8A and 0x8B is required to access this register Bit Mode Symbol Description Reset 7:0 W CP_RISE_TIME Set 0x80 (10000000) for maximum output power. Set 0x84 (10000100) for reduced inrush current 10000000 Table 185: A_CP_MODE 0xA7 Unlocking registers 0x8A and 0x8B is required to access this register Bit Mode Symbol Description Reset 7:0 W A_CP_MODE Headphone charge pump enable: Set 0x7C (01111110) 01111110 |
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