MPC8280 datasheet(42/1386 Pages) FREESCALE

42 / 1386 page

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

xlii

Freescale Semiconductor

Contents

Paragraph

Number

Title

Page

Number

34.4.8.6

IDCR Counter Algorithm .................................................................................... 34-50

34.4.8.7

IDCR Events ........................................................................................................ 34-50

34.4.9

APC Programming for IMA .................................................................................... 34-51

34.4.9.1

Programming for CBR, UBR, VBR, and UBR+ ................................................. 34-52

34.4.9.2

Programming for ABR ........................................................................................ 34-52

34.4.10

Changing IMA Version............................................................................................ 34-53

34.5

IMA Software Interface and Requirements ................................................................. 34-53

34.5.1

Software Model........................................................................................................ 34-53

34.5.2

Initialization Procedure............................................................................................ 34-54

34.5.3

Software Responsibilities ........................................................................................ 34-54

34.5.3.1

System Definition ................................................................................................ 34-54

34.5.3.2

General Operation................................................................................................ 34-55

34.5.3.3

Receive Link State Machine Control................................................................... 34-55

34.5.3.4

Receive Group State Machine Control ................................................................ 34-55

34.5.3.5

Transmit Link State Machine Control ................................................................. 34-55

34.5.3.6

Transmit Group State Machine Control............................................................... 34-56

34.5.3.7

Group Symmetry Control .................................................................................... 34-56

34.5.3.8

ICP End-to-End Channel Transmission............................................................... 34-56

34.5.3.9

Link Addition and Slow Recovery (LASR) Procedure ....................................... 34-56

34.5.3.10

Failure Alarms ..................................................................................................... 34-56

34.5.3.11

Test Pattern Control ............................................................................................. 34-57

34.5.3.12

Performance Parameter Measurement and Reporting ......................................... 34-57

34.5.3.13

SNMP MIBs ........................................................................................................ 34-57

34.5.4

IMA Software Procedures ....................................................................................... 34-57

34.5.4.1

Transmit ICP Cell Signalling............................................................................... 34-57

34.5.4.2

Receive Link Start-up Procedure ......................................................................... 34-57

34.5.4.3

Group Start-up Procedure ................................................................................... 34-58

34.5.4.3.1

As Initiator (TX).............................................................................................. 34-59

34.5.4.3.2

As Responder (RX) ......................................................................................... 34-60

34.5.4.4

Link Addition Procedure ..................................................................................... 34-60

34.5.4.4.1

Rx Steps ........................................................................................................... 34-61

34.5.4.4.2

TX Parameters ................................................................................................. 34-61

34.5.4.5

Link Removal Procedure ..................................................................................... 34-62

34.5.4.5.1

Rx Steps ........................................................................................................... 34-62

34.5.4.5.2

TX Parameters ................................................................................................. 34-63

34.5.4.6

Link Receive Deactivation Procedure ................................................................. 34-63

34.5.4.7

Link Receive Reactivation Procedure ................................................................. 34-64

34.5.4.8

TRL On-the-Fly Change Procedure..................................................................... 34-64

34.5.4.9

Transmit Event Response Procedures.................................................................. 34-65

34.5.4.10

Receive Event Response Procedures ................................................................... 34-65

34.5.4.11

Test Pattern Procedure ......................................................................................... 34-67

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