STLC5464 datasheet(12/83 Pages) STMICROELECTRONICS

12 / 83 page

I.2 - Pin Description (continued)

Pin N

Symbol

Type

Function

MICROPROCESSOR INTERFACE (continued)

100

I/O

Data bit 9 for

µP if not multiplexed

101

D10

I/O

Data bit 10 for

µP if not multiplexed

102

D11

I/O

Data bit 11 for

µP if not multiplexed

103

D12

I/O

Data bit 12 for

µP if not multiplexed

104

D13

I/O

Data bit 13 for

µP if not multiplexed

105

D14

I/O

Data bit 14 for

µP if not multiplexed

106

D15

I/O

Data bit 15 for

µP if not multiplexed

MEMORY INTERFACE

109

TRI

Token Ring Input (for use

Multi-HDLCs in cascade)

110

TRO

Token Ring Output (for use

Multi-HDLCs in cascade)

111

NWE

O4T

Write Enable for memory circuits

112

NOE

O4T

Control Output Enable for memory circuits

113

NRAS0/NCE0

O4T

Row Address Strobe Bank 0 / Chip Enable 0 for SRAM

114

NCAS0/NCE1

O4T

Column Address Strobe Bank 0 / Chip Enable1 for SRAM

115

NRAS1/NCE2

O4T

Row Address Strobe Bank 1 / Chip Enable 2 for SRAM

116

NCAS1/NCE3

O4T

Column Address Strobe Bank 1 / Chip Enable 3 for SRAM

117

NRAS2/NCE4

O4T

Row Address Strobe Bank 2 / Chip Enable 4 for SRAM

118

NCE5

O4T

Chip Enable 5 for SRAM

119

NRAS3/NCE6

O4T

Row Address Strobe Bank 3 / Chip Enable 6 for SRAM

120

NCE7

O4T

Chip Enable 7 for SRAM

123

ADM0

O8T

Address bit 0 for SRAM and DRAM

124

ADM1

O8T

Address bit 1 for SRAM and DRAM

125

ADM2

O8T

Address bit 2 for SRAM and DRAM

126

ADM3

O8T

Address bit 3 for SRAM and DRAM

127

ADM4

O8T

Address bit 4 for SRAM and DRAM

128

ADM5

O8T

Address bit 5 for SRAM and DRAM

129

ADM6

O8T

Address bit 6 for SRAM and DRAM

130

ADM7

O8T

Address bit 7 for SRAM and DRAM

131

ADM8

O8T

Address bit 8 for SRAM and DRAM

132

ADM9

O8T

Address bit 9 for SRAM and DRAM

135

ADM10

O8T

Address bit 10 for SRAM and DRAM

136

ADM11

O8T

Address bit 11 for SRAM only

137

ADM12

O8T

Address bit 12 for SRAM only

138

ADM13

O8T

Address bit 13 for SRAM only

139

ADM14

O8T

Address bit 14 for SRAM only

Type : I1 = Input TTL ;

I2 = I1 + Pull-up ;

I3 = I1 + Hysteresis ;

I4 = I3 + Pull-up ;

O4 = Output CMOS 4mA ;

O4T = O4 + Tristate ;

O8 = Output CMOS 8mA, ”1” and ”0” at Low Impedance ;

O8D = Output CMOS 8mA, Open Drain ;

O8DT = Output CMOS 8mA, Open Drain or Tristate ;

O8T = Output CMOS 8mA, Tristate

I - PIN INFORMATION (continued)

STLC5464

12/83

STLC5464 Arkusz danych(PDF) 12 Page - STMicroelectronics

STLC5464 Arkusz danych(HTML) 12 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83

Arkusz danych Pobierz

Link URL