QG80331M800 datasheet(24/67 Pages) INTEL

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Specification Update

Intel® 80331 I/O Processor

Non-Core Errata

22.

Primary bus pin mode behavior incorrect during reset in the 80331 no

bridge mode

Problem:

In the 80331 no bridge mode (BRG_EN = 0), several unused primary PCI signals provide the

wrong behavior during reset. The following signals float (‘Z’ = output disabled) during reset:

P_AD[63:0], P_PAR, P_PAR64, P_C/BE[7:0]#.

Implication:

No negative impact expected.

Workaround:

No workaround.

Status:

Fixed. Fixed in B-0 stepping. See the Table , “Summary Table of Changes” on page 9. These

signals are ‘H’ (pulled up to Vcc).

23.

P_REQ# pin mode behavior when in the 80331 no bridge mode

Problem:

In the 80331 No Bridge Mode (BRG_EN = 0), P_REQ# (ball T6) drives a 1 in A-1, needs to be

“H” (pulled up to Vcc).

Implication:

No negative impact expected.

Workaround:

No workaround.

Status:

Fixed. Fixed in B-0 stepping. See the Table , “Summary Table of Changes” on page 9. Note:

P_GNT# and P_REQ# signals have new ball locations on B-0, see Specification Change #5.

24.

Master abort after data transfer within a single ADB on PCI-X to PCI-X read

block transactions may cause data corruption or deadlock

Problem:

When a PCI-X to PCI-X Memory Read Block request is terminated with a single data phase

disconnect (SDPD) by the target after the target has provided some data, and a subsequent request

in the same allowable disconnect boundary (ADB) is not claimed (Master Abort), the bridge may

deallocate memory buffers not involved in the transaction.

Implication:

This may cause data corruption of another transaction or result in deadlock. This erratum only

occurs in PCI-X to PCI-X mode, the read byte count must be greater than 4 bytes and must not

cross an ADB boundary. The target must respond with a single data phase disconnect and when the

bridge attempts to get the remainder of the data, the target does not claim the transaction.

Workaround:

No workaround. The likelihood of this occurrence is extremely small and would require 'bad'

behavior by the target.

Status:

Fixed. Fixed in C-0 stepping. See the Table , “Summary Table of Changes” on page 9.

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