QG80331M800 datasheet(32/67 Pages) INTEL

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Specification Update

Intel® 80331 I/O Processor

Non-Core Errata

42.

DMA CRC result is byte reversed

Problem:

The DMA CRC result value is byte reversed.

Example CRC operation with the DMA:

CRC Seed: 0x0000 0000

Data Pattern (16 bytes): 0x1234 5678, 0x1457 9098, 0x1234 5678 0x1457 9098

Expected CRC Value: 0x6791 25DA

Actual CRC Value: 0xDA25 9167

CRC Seed: 0x1122 3344

Data Pattern(16 bytes): 0x1234 5678 0x1457 9098, 0x1234 5678 0x1457 9098

Expected CRC Value: 0x1D2C B941

Actual CRC Value:

0x41B9 2C1D

Implication:

Data corruption occurs when software does not take care of the byte reversal.

Workaround:

Software must byte reverse the CRC result after the DMA completes.

Status:

No Fix. Not to be fixed. See the Table , “Summary Table of Changes” on page 9.

43.

CRC corruption on PCI-to-local DMA transfers

Problem:

CRC corruption can occur when polling DMA registers during PCI-to-local transfers. CRC

corruption happens regardless of whether the transfer data is written to memory (DMA Transfer

disable bit DCR.7, is set). Both DMA channels are affected.

Implication:

CRC data corruption occurs. The DMA transfer itself is not affected by this erratum.

Workaround:

Use local address sources only when calculating CRC.

Status:

No Fix. Not to be fixed. See the Table , “Summary Table of Changes” on page 9.

44.

Byte Count Modified bit set to 1

Problem:

During a memory read DWORD which crosses the 1 MB boundary in PCI-X to PCI mode, the split

completion has the correct data and byte count but the BCM (Byte Count Modified) bit in the

attribute field is set to 1. In the PCI-X Addendum to the PCI Local Bus Specification, Revision 1.0a

description of the BCM bit it states, “BCM is used only for split completions resulting from burst

transaction and is set to 0 for split completions resulting from all other commands.”

Implication:

The PCI-X Addendum to the PCI Local Bus Specification, Revision 1.0a states that for non-burst

transactions that the BCM bit is not to be used and should read 0, this bit is used for diagnostic

purposes, and targets (bridges and requesters) are permitted to ignore this bit.

Workaround:

BCM is a non-error status bit, only used for “flow control” in split completions and should be

ignored.

Status:

Fixed. Fixed in D-0 stepping. See the Table , “Summary Table of Changes” on page 9.

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