LSM9DS0TR datasheet(63/74 Pages) STMICROELECTRONICS

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LSM9DS0

8.52

INT_GEN_1_REG (30h)

This register contains the settings for the inertial interrupt generator 1.

EMPTY

Empty status.

EMPTY bit is set to ‘1’ when all FIFO samples have been read and FIFO is empty.

FSS4-FSS0

FIFO stored data level.

FSS4-FSS0 bits contain the current number of unread FIFO levels.

Table 98. FIFO_SRC_REG description (continued)

Table 99. INT_GEN_1_REG register

AOI

ZHIE/

ZUPE

ZLIE/

ZDOWNE

YHIE/

YUPE

YLIE/

YDOWNE

XHIE/

XUPE

XLIE/

XDOWNE

Table 100. INT_GEN_1_REG description

AOI

And/Or combination of Interrupt events. Default value: 0. Refer to Table 101:

Interrupt mode

6-direction detection function enabled. Default value: 0. Refer to Table 101:

Interrupt mode

ZHIE/

ZUPE

Enable interrupt generation on Z high event or on direction recognition. Default

value: 0 (0: disable interrupt request;1: enable interrupt request)

ZLIE/

ZDOWNE

Enable interrupt generation on Z low event or on direction recognition. Default

value: 0 (0: disable interrupt request;1: enable interrupt request)

YHIE/

YUPE

Enable interrupt generation on Y high event or on direction recognition. Default

value: 0 (0: disable interrupt request; 1: enable interrupt request.)

YLIE/

YDOWNE

Enable interrupt generation on Y low event or on direction recognition. Default

value: 0 (0: disable interrupt request; 1: enable interrupt request.)

XHIE/

XUPE

Enable interrupt generation on X high event or on direction recognition. Default

value: 0 (0: disable interrupt request; 1: enable interrupt request.)

XLIE/XDOWNE

Enable interrupt generation on X low event or on direction recognition. Default

value: 0 (0: disable interrupt request; 1: enable interrupt request.)

Table 101. Interrupt mode

AOI

Interrupt mode

OR combination of interrupt events

6-direction movement recognition

AND combination of interrupt events

6-direction position recognition

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