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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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LSM9DS0TR Arkusz danych(PDF) 42 Page - STMicroelectronics |
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LSM9DS0TR Arkusz danych(HTML) 42 Page - STMicroelectronics |
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42 / 74 page  Register description LSM9DS0 42/74 DocID024763 Rev 2 A combination of PD, Zen, Yen, Xen is used to set device to different modes (power-down / normal / sleep mode) in accordance with Table 22 below. 8.3 CTRL_REG2_G (21h) 00 11 95 25 01 00 190 12.5 01 01 190 25 01 10 190 50 01 11 190 70 10 00 380 20 10 01 380 25 10 10 380 50 10 11 380 100 11 00 760 30 11 01 760 35 11 10 760 50 11 11 760 100 Table 22. Power mode selection configuration Mode PD Zen Yen Xen Power-down 0 - - - Sleep 1 0 0 0 Normal 1 - - - Table 21. DR and BW configuration setting (continued) DR [1:0] BW [1:0] ODR (Hz) Cutoff Table 23. CTRL_REG2_G register 0(1) 1. These bits must be set to ‘0’ to ensure proper operation of the device 0(1) HPM1 HPM1 HPCF3 HPCF2 HPCF1 HPCF0 Table 24. CTRL_REG2_G description HPM1- HPM0 High-pass filter mode selection. Default value: 00 Refer to Table 25 HPCF3- HPCF0 High-pass filter cutoff frequency selection Refer to Table 26 |
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