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WM8602SEDS/V Arkusz danych(PDF) 37 Page - Wolfson Microelectronics plc |
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WM8602SEDS/V Arkusz danych(HTML) 37 Page - Wolfson Microelectronics plc |
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37 / 46 page ![]() Product Preview WM8602 w PP Rev 1.5 May 2004 37 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 0 STDBY 1 Standby select: 0 : Normal Mode 1: Standby Mode 1 OPDISR 0 Output disable register 0: Normal mode 1: PWM output disabled R29 (1Dh) Power Down 2 MENA 1 OPDIS Mode 0 : Synchronous 1: Latched, reset via Control I/F Table 48 Power Down EXTERNAL APPLICATION POWER-DOWN (EAPDB) PIN The state of the output pin EAPDB shows whether the device is disabled (i.e. OPDIS input pin active or STDBY register set). EAPDB STATE DESCRIPTION 1 The device is operating correctly External Application Power Down 0 (default) The outputs are disabled or the WM8602 device is in Standby (default) mode Table 49 EAPDB Pin RESET The WM8602 device can be reset writing to the Reset register as defined in Table 50. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 0 RLENA 0 Writing 1 to bit 0 of the register will reset OPDIS R30 (1Eh) Reset all RESET 0 Writing all 1’s to the register will reset the device and register settings Table 50 Reset Note: RESET or RLENA will be applied at the end of the register write and released at the beginning of the next register write. I.e. to reset the OPDIS register write 1 to bit 0 of the Reset register and them write 0 to bit 0. EXTERNAL POWER SUPPLY CLOCK The WM8602 device can generate a clock signal for an external PSU (Power Supply Unit) which is available at the CLKPSU pin. CLKPSU t PCLKPSU t HCLKPSU Figure 23 External Power Supply Clock |
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