MSC8112 datasheet(3/44 Pages) FREESCALE

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MSC8112 Dual Core Digital Signal Processor Data Sheet, Rev. 0

Freescale Semiconductor

Figure 1. MSC8112 Block Diagram

Figure 2. StarCore® SC140 DSP Extended Core Block Diagram

MQBus

SQBus

Local Bus

128

Boot

ROM

PLL

JTAG

RS-232

Internal Local Bus

Internal System Bus

IPBus

IP Master

UART

Memory

Controller

RAM

GPIO Pins

Interrupts

Memory

Controller

System Bus

32/64

DSI Port

32/64

PLL/Clock

JTAG Port

SC140

Extended Core

SC140

Extended Core

System

Interface

32 Timers

4 TDMs

DMA

Bridge

SIU

Registers

Direct

Slave

Interface

(DSI)

8 Hardware

Semaphores

GIC

GPIO

MII/RMII/SMII

Ethernet

SC140

Power

Management

Core

Program

Sequencer

Address

File

Data ALU

File

Address

ALU

EOnCE

JTAG

QBus

IRQs

MQBus

SQBus

Local Bus

128

LIC

PIC

128

QBus

Interface

Instruction

Cache

RAM

Notes: 1. The arrows show the data transfer direction.

QBus

Bank 1

QBus

Bank 3

2. The QBus interface includes a bus switch, write buffer, fetch unit, and a control unit that defines

four QBus banks. In addition, the QBC handles internal memory contentions.

QBC

SC140 Core

Data

ALU

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