ATmega165 datasheet(30/336 Pages) ATMEL

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ATmega165/V

2573G–AVR–07/09

zero. CLKPCE is cleared by hardware four cycles after it is written or when CLKPS bits

are written. Rewriting the CLKPCE bit within this time-out period does neither extend the

time-out period, nor clear the CLKPCE bit.

• Bits 3..0 – CLKPS3..0: Clock Prescaler Select Bits 3 - 0

These bits define the division factor between the selected clock source and the internal

system clock. These bits can be written run-time to vary the clock frequency to suit the

application requirements. As the divider divides the master clock input to the MCU, the

speed of all synchronous peripherals is reduced when a division factor is used. The divi-

sion factors are given in Table 13.

To avoid unintentional changes of clock frequency, a special write procedure must be

followed to change the CLKPS bits:

Write the Clock Prescaler Change Enable (CLKPCE) bit to one and all other bits

in CLKPR to zero.

Within four cycles, write the desired value to CLKPS while writing a zero to

CLKPCE.

Interrupts must be disabled when changing prescaler setting to make sure the write pro-

cedure is not interrupted.

The CKDIV8 Fuse determines the initial value of the CLKPS bits. If CKDIV8 is unpro-

grammed, the CLKPS bits will be reset to “0000”. If CKDIV8 is programmed, CLKPS bits

are reset to “0011”, giving a division factor of 8 at start up. This feature should be used if

the selected clock source has a higher frequency than the maximum frequency of the

device at the present operating conditions. Note that any value can be written to the

CLKPS bits regardless of the CKDIV8 Fuse setting. The Application software must

ensure that a sufficient division factor is chosen if the selected clock source has a higher

frequency than the maximum frequency of the device at the present operating condi-

tions. The device is shipped with the CKDIV8 Fuse programmed.

Table 13. Clock Prescaler Select

CLKPS3

CLKPS2

CLKPS1

CLKPS0

Clock Division Factor

0000

0001

0010

0011

0100

0101

0110

0111

128

1000

256

1001

Reserved

1010

Reserved

1011

Reserved

1100

Reserved

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