ATmega165 datasheet(49/336 Pages) ATMEL

49 / 336 page

ATmega165/V

2573G–AVR–07/09

When the BOOTRST Fuse is programmed, the Boot section size set to 2K bytes and the

IVSEL bit in the MCUCR Register is set before any interrupts are enabled, the most typ-

ical and general program setup for the Reset and Interrupt Vector Addresses is:

Address

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Code

Comments

;

.org 0x1C00

0x1C00

jmp

RESET

; Reset handler

0x1C02

jmp

EXT_INT0

; IRQ0 Handler

0x1C04

jmp

PCINT0

; PCINT0 Handler

...

;

0x1C2C

jmp

SPM_RDY

; Store Program Memory Ready Handler

;

0x1C2E

RESET:

ldi

r16,high(RAMEND) ; Main program start

0x1C2F

out

SPH,r16

; Set Stack Pointer to top of RAM

0x1C30

ldi

r16,low(RAMEND)

0x1C31

out

SPL,r16

0x1C32

sei

; Enable interrupts

0x1C33

<instr>

xxx

Moving Interrupts Between

Application and Boot Space

The General Interrupt Control Register controls the placement of the Interrupt Vector

table.

MCU Control Register –

MCUCR

• Bit 1 – IVSEL: Interrupt Vector Select

When the IVSEL bit is cleared (zero), the Interrupt Vectors are placed at the start of the

Flash memory. When this bit is set (one), the Interrupt Vectors are moved to the begin-

ning of the Boot Loader section of the Flash. The actual address of the start of the Boot

Flash Section is determined by the BOOTSZ Fuses. Refer to the section “Boot Loader

Support – Read-While-Write Self-Programming” on page 232 for details. To avoid unin-

tentional changes of Interrupt Vector tables, a special write procedure must be followed

to change the IVSEL bit:

1.Write the Interrupt Vector Change Enable (IVCE) bit to one.

2.Within four cycles, write the desired value to IVSEL while writing a zero to

IVCE.

Interrupts will automatically be disabled while this sequence is executed. Interrupts are

disabled in the cycle IVCE is set, and they remain disabled until after the instruction fol-

lowing the write to IVSEL. If IVSEL is not written, interrupts remain disabled for four

cycles. The I-bit in the Status Register is unaffected by the automatic disabling.

Note:

If Interrupt Vectors are placed in the Boot Loader section and Boot Lock bit BLB02 is pro-

grammed, interrupts are disabled while executing from the Application section. If

Interrupt Vectors are placed in the Application section and Boot Lock bit BLB12 is pro-

gramed, interrupts are disabled while executing from the Boot Loader section. Refer to

the section “Boot Loader Support – Read-While-Write Self-Programming” on page 232

for details on Boot Lock bits.

• Bit 0 – IVCE: Interrupt Vector Change Enable

Bit

654

JTD

–

PUD

–

IVSEL

IVCE

MCUCR

Read/Write

R/W

Initial Value

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