ATmega165 datasheet(43/336 Pages) ATMEL

43 / 336 page

ATmega165/V

2573G–AVR–07/09

Watchdog Timer

The Watchdog Timer is clocked from a separate On-chip Oscillator which runs at

1 MHz. This is the typical value at V

CC = 5V. See characterization data for typical values

at other V

CC levels. By controlling the Watchdog Timer prescaler, the Watchdog Reset

interval can be adjusted as shown in Table 21 on page 44. The WDR – Watchdog Reset

– instruction resets the Watchdog Timer. The Watchdog Timer is also reset when it is

disabled and when a Chip Reset occurs. Eight different clock cycle periods can be

selected to determine the reset period. If the reset period expires without another

Watchdog Reset, the ATmega165 resets and executes from the Reset Vector. For tim-

ing details on the Watchdog Reset, refer to Table 21 on page 44.

To prevent unintentional disabling of the Watchdog or unintentional change of time-out

period, two different safety levels are selected by the fuse WDTON as shown in Table

20. Refer to “Timed Sequences for Changing the Configuration of the Watchdog Timer”

on page 45 for details.

Figure 20. Watchdog Timer

Watchdog Timer Control

• Bits 7..5 – Res: Reserved Bits

These bits are reserved bits in the ATmega165 and will always read as zero.

• Bit 4 – WDCE: Watchdog Change Enable

This bit must be set when the WDE bit is written to logic zero. Otherwise, the Watchdog

will not be disabled. Once written to one, hardware will clear this bit after four clock

cycles. Refer to the description of the WDE bit for a Watchdog disable procedure. This

bit must also be set when changing the prescaler bits. See “Timed Sequences for

Changing the Configuration of the Watchdog Timer” on page 45.

Table 20. WDT Configuration as a Function of the Fuse Settings of WDTON

WDTON

Safety

Level

WDT Initial

State

How to Disable the

WDT

How to Change

Time-out

Unprogrammed

Disabled

Timed sequence

Programmed

Enabled

Always enabled

Timed sequence

WATCHDOG

OSCILLATOR

Bit

7654

321

–

WDCE

WDE

WDP2

WDP1

WDP0

WDTCR

Read/Write

R/W

Initial Value

0000

000

ATmega165 Arkusz danych(PDF) 43 Page - ATMEL Corporation

ATmega165 Arkusz danych(HTML) 43 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Arkusz danych Pobierz

Link URL