ST7MC1K2 datasheet(57/371 Pages) STMICROELECTRONICS

57 / 371 page

Obsolete

Product(s)

- Obsolete

Product(s)

ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto

Supply, reset and clock

57/371

3:2 TB[1:0]

Time base control

These bits select the programmable divider time base. They are set and cleared by

software:

00: Time base (counter prescaler 16000) = 4 ms (fOSC2 = 4 MHz)

and 2 ms (fOSC2 =8 MHz)

01: Time base (counter prescaler 32000) = 8 ms (fOSC2 = 4 MHz)

and 4 ms (fOSC2 =8 MHz)

10: Time base (counter prescaler 80000) = 20 ms (fOSC2 = 4 MHz)

and 10 ms (fOSC2 =8 MHz)

11: Time base (counter prescaler 200000) = 50 ms (fOSC2 = 4 MHz)

and 25 ms (fOSC2 =8 MHz)

A modification of the time base is taken into account at the end of the current period

(previously set) to avoid an unwanted time shift. This allows this time base to be

used as a real time clock.

1OIE

Oscillator interrupt enable

This bit set and cleared by software.

0: Oscillator interrupt disabled

1: Oscillator interrupt enabled

This interrupt can be used to exit from Active Halt mode. When this bit is set, calling

the ST7 software HALT instruction enters the Active HALT power saving mode.

0OIF

Oscillator interrupt flag

This bit is set by hardware and cleared by software reading the CSR register. It

indicates when set that the main oscillator has reached the selected elapsed time

(TB1:0).

0: Timeout not reached

1: Timeout reached

Caution: The BRES and BSET instructions must not be used on the MCCSR

Table 13.

MCCSR register description (continued)

Bit

Name

Function

Obsolete

Product(s)

- Obsolete

Product(s)

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