ST7MC1K2 datasheet(102/371 Pages) STMICROELECTRONICS

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ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto

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ART input capture registers (ARTICRx)

Table 44.

ARTICCSR register description

Bit

Name

Function

7:6

Reserved, must be kept cleared.

5:4

CS[2:1]

Capture sensitivity

These bits are set and cleared by software. They determine the trigger event

polarity on the corresponding input capture channel.

0: Falling edge triggers capture on channel x

1: Rising edge triggers capture on channel x

3:2 CIE[2:1]

Capture interrupt enable

These bits are set and cleared by software. They enable or disable the input

capture channel interrupts independently.

0: Input capture channel x interrupt disabled

1: Input capture channel x interrupt enabled

1:0

CF[2:1]

Capture flag

These bits are set by hardware and cleared by software reading the corresponding

ARTICRx register. Each CFx bit indicates that an input capture x has occurred.

0: No input capture on channel x

1: An input capture has occurred on channel x

ARTICRx

Reset value: 0000 0000 (00h)

654

IC[7:0]

Table 45.

ARTICRx register description

Bit

Name

Function

7:0

IC[7:0]

Input capture data

These read-only bits are set and cleared by hardware. An ARTICRx register

contains the 8-bit auto-reload counter value transferred by the input capture channel

x event.

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