ADBMS2950BCCSZ datasheet(28/97 Pages) AD

28 / 97 page

ADBMS2950B

Data Sheet

Rev. 0 | Page 28 of 97

The daisy-chain scenario considers a reconfigurable 400V/800V

battery supervised by two pack monitors ADBMS2950B (one

for each 400V battery) and 10 cell monitors ADBMS6830B (10

× 16 = 160 cells total) connected in a reversible daisy-chain

according to Figure 22. During normal operation, the reversible

isoSPI ring is split through software (COMMBK) into two

chains allowing simultaneous serial transactions, one chain with

NP = 2, NQ = 5 and one with NP = 0, NQ = 5. The latter is not

considered here, being a cell monitor only daisy-chain resulting

in shorter serial transactions and thus consuming less time on

the SPI controller. For the daisy-chain scenario, the first chain

with NP = 2, NQ = 5 is assumed.

For the best communication efficiency, the pack monitors are

placed at the beginning of the daisy-chain. This allows reading

data from the pack monitors only (RP, Table 37) without the

overhead of data returned by the cell monitors. To support

LPCM on the cell monitors while shutting down the power to

the ADBMS2950B devices, those are placed to one end of the

isoSPI ring only, which allows the LPCM Heartbeat messages to

propagate to the other end.

For simplicity, it is assumed the data received from the pack

monitors is discarded when reading from the cell monitors. For

improved efficiency, the BMS controller software can consider

this data, which allows to reduce the number of read commands

required for the pack monitors.

The timing parameter Tdb can be as low as 0 and depends on

the implementation of the SPI controller driver and the

operating system (OS) only. The timing parameter Ts must be at

least 2 μs according to the Table 14 parameter t5, CSB Rising

Edge to CSB Falling Edge, but it is typically greater and also

depends on the SPI controller driver and OS.

Table 34. SPI Sequence Timing Parameters

Name

Value

Description

Absolute SPI transaction time stamp.

CMD

Command name.

Type

Command type.

Number of command (and PEC) bytes is always 4.

Number of bytes depends on command type.

Number of command bytes plus data bytes.

Serial transaction time equals B × Tb + Ts.

Number of pack monitors within daisy-chain.

Number of cell monitors within daisy-chain.

Total number of devices in daisy-chain.

Tdb

Byte delay to account for BMS controller SW SPI controller

delays.

Fspi

2 MHz

SPI frequency, ADBMS devices support up to 2 MHz.

4 μs

Transaction time per byte is equal to 8 ÷ Fspi + Tdb.

2 μs

BMS controller SW dependent delay between SPI

transactions.

Parameter values not given in Table 34 depend on the use case

scenario and are listed in Table 35, Table 36, Table 37, and

Table 38.

Any serial transaction begins with 2 bytes command code

followed by 2 bytes command PEC according to Table 25,

Table 26, Table 27, and Table 28. The 4-byte command phase

(CMD0, CMD1, PEC0, PEC1) is received simultaneously by all

devices besides latencies due to cable and device transceiver

propagation delays specified as tDSY(D) in Table 17.

After the command phase, when reading or writing data, all

devices in the daisy-chain form a logical shift register with 8

bytes per device. Reading or writing the whole daisy-chain

requires a SPI transaction of 4 + N × 8 bytes. A subset of devices

at the beginning of the daisy-chain can be accessed by cutting

the transaction at a device boundary.

Single Device

When operating with a single ADBMS2950B device one can

benefit from the efficiency of the Read All RDALL (RALL)

commands transmitting a total of 20 data bytes. 6 bytes register

groups can also be accessed by Read RD48 (R) commands and

are written by Write WR48 (W) commands. 4 bytes only Action

(A) commands are used for example to trigger ADC

conversions (for example, ADV).

Table 35. Single Device Command Types

Type

Description

Action command, no data bytes.

RALL

Read All (Bd = 20).

Read (Bd = 8).

Write (Bd = 8).

Table 36 shows the timing of an example sequence, writing to

CFGA to adjust the VSx bits, trigger VxADC (ADV) and

AUX ADC (ADX) and read all conversion results (RDALLV,

RDALLR, RDALLX). Note that the host controller must wait for

all conversions to be completed before reading the results.

Assuming such a sequence is scheduled at a fixed period T,

where T > Total-Conversion-Time, the order of read commands

and write together with trigger commands can be swapped

allowing to read previous results before triggering new

conversions.

Table 36. Single Device Vx and Diagnostic Measure Sequence

Example

CMD

Type

Description

WRCFGA

μs

Write CFGA to set VSx.

ADV

μs

Trigger VxADCs (V1 to V10).

ADX

μs

Trigger AUX ADC (VREF1P25).

RDALLV

RALL

μs

Read V1 to V8 by V1ADC and V9,

V10 by V2ADC.

RDALLR

RALL

μs

Read V1 to V6, V9, V10 by V2ADC

and V7, V8 by V1ADC.

RDALLX

RALL

μs

Read all AUX ADC results.

Total

380

μs

Daisy-Chain

When operating with a daisy-chain of the ADBMS2950B (and

optional subsequent ADBMS6830B) devices, the Read All

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