ADBMS2950BCCSZ datasheet(33/97 Pages) AD

33 / 97 page

Data Sheet

ADBMS2950B

Rev. 0 | Page 33 of 97

Together with the back-to-back reading of the accumulated

conversion results, the host still can read the Ix, VBx registers at

any time to get fast measurement snapshots if required.

Figure 29 shows the Ix, VBx, IxACC, VBxACC, I1CNT, and the

I1PHA register update timing. The update for the accumulated

registers IxACC, VBxACC is shown as examples for ACCI

settings 0 and 1 (resulting in ACCN 4 and 8). For more details,

see the Continuous Sampling and Coulomb Counting section.

Figure 29. Relation of I1CNT, I2PHA, Ix, VBx, and Accumulated Result Registers IxACC, VBxACC Update for Two Settings of ACCN 4 and 8 (ACCI 0 and 1)

Redundant IxADC and VBxADC Measurements

If the redundancy bit RD in an ADI1 command is set, the

I1ADC and I2ADC, as well as the VB1ADC and VB2ADC, are

triggered to provide redundant, synchronous measurements.

After every conversion, the host controller can compare the

results of I2ADC with I1ADC as well as the results of VB2ADC

with VB1ADC.

If a single-shot ADI2 command is issued (see OPT command

bits), the I2ADC and VB2ADC perform a single-shot

conversion immediately and then stop.

If a continuous mode ADI2 command is issued while the

I1ADC and VB1ADC are already in continuous mode, the

I2ADC and VB2ADC wait for the ongoing accumulation of the

channel 1 ADCs conversions to finish (depends on ACCN) and

start converting synchronously to the next accumulation cycle,

which allows comparison of the result registers of both channels

in the host controller.

If a continuous mode ADI2 command is issued while the

I1ADC, VB1ADC, I2ADC, and VB2ADC are set to continuous

redundant mode, the I2ADC and VB2ADC interrupt their

current conversion and start converting again synchronously to

the next accumulation cycle. This sequence delays the update of

the I1CNT and I1PHA until the I1ADC and VB1ADC have

finished their next two 1 ms conversion cycles. The updated

I1CNT value is the previous I1CNT value incremented by two

and the I1PHA value is zero.

Table 40. I1ADC, VB1ADC, I2ADC, VB2ADC Command Codes

Name

Type

BIT

BIT 7

BIT

BIT 4

BIT

BIT 1

BIT 0

Description

ADI1

CMD

OPT[3]

OPT[2]

OPT[1]

OPT[0]

Start I1ADC and VB1ADC (ADBMS6830B: ADCV).

ADI2

CMD

OPT[3]

OPT[2]

OPT[1]

OPT[0]

Start I2ADC and VB2ADC (ADBMS6830B: ADSV).

CLRI

CMD

Clear IxADC and VBxADC results (ADBMS6830B:

CLRCELL).

CLRA

CMD

Clear IxADC and VBxADC accumulators

(ADBMS6830B: CLRFC).

RDI

RD48

Read I1ADC and I2ADC results (ADBMS6830B:

RDCVA).

ADBMS6830B compatible code RDFCA.

RDVB

RD48

Read VB1ADC and VB2ADC results

(ADBMS6830B: RDCVB).

ADBMS6830B compatible code RDFCB.

RDIACC

RD48

Read I1ADC and I2ADC accumulators

(ADBMS6830B: RDACA).

RDVBACC

RD48

Read VB1ADC and VB2ADC accumulators

(ADBMS6830B: RDACB).

RDIVB1

RD48

Read I1ADC and VB1ADC results (ADBMS6830B:

RDCVC).

ADBMS6830B compatible code RDFCC.

RDIVB1ACC

RD48

Read I1ADC and VB1ADC accumulators

(ADBMS6830B: RDACC).

RDALLI

RD160

Read IxADC and VBxADC results.

RDALLA

RD160

Read IxADC and VBxADC accumulators.

ADBMS2950BCCSZ Arkusz danych(PDF) 33 Page - Analog Devices

ADBMS2950BCCSZ Arkusz danych(HTML) 33 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97

Arkusz danych Pobierz

Link URL