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ADBMS2950BCCSZ Arkusz danych(PDF) 35 Page - Analog Devices

Numer części ADBMS2950BCCSZ
Szczegółowy opis  Battery Pack Monitor
PDF  97 Pages
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
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ADBMS2950BCCSZ Arkusz danych(HTML) 35 Page - Analog Devices

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Data Sheet
ADBMS2950B
Rev. 0 | Page 35 of 97
Table 42. ADI2 Command Result while I1ADC in Continuous Operation
ADI2 Command
DIAGSEL
Diagnostic
Continuous
Redundant
Description
Continuous
Diagnostic
0b000
No
Yes
Yes
Non-diagnostic, Align (sync) to next I1ADC, VB1ADC accumulation cycle (ACCN),
Continuous.
Continuous
Diagnostic
unequal
0b000
Yes
Yes
Yes
Diagnostic, Align (sync) to next I1ADC, VB1ADC accumulation cycle (ACCN),
Continuous.
Continuous
0bxxx
No
Yes
Yes
Non-diagnostic, Align (sync) to next I1ADC, VB1ADC accumulation cycle (ACCN),
Continuous.
Single-Shot
Diagnostic
0b000
No
No
No
Non-diagnostic, Immediate single shot, Asynchronous to I1ADC, VB1ADC.
Single-Shot
Diagnostic
unequal
0b000
Yes
No
No
Diagnostic, Immediate single shot, Asynchronous to I1ADC, VB1ADC.
Single Shot
0bxxx
No
No
No
Non-diagnostic, Immediate single shot, Asynchronous to I1ADC, VB1ADC.
Redundant I2ADC and VB2ADC diagnostic measurements
(synchronous to I1ADC and VB1ADC for redundancy) must
be terminated through one of the two ADI2 single-shot
measurement (non-diagnostic) or any other ADI2 single-shot
diagnostic (DIAG) measurement command after DIAGSEL has
been set to 0b000.
Table 43. I1ADC, VB1ADC, I2ADC, VB2ADC Result Registers
Name
Type
Reset
CLRI
Description
I1
RO, FRZ
0x03FFFF
0xFC0000
Signed 24-bit I1ADC result register, VSHUNT = I1 × 1 µV = I1A − I1B.
I2
RO, FRZ
0x03FFFF
0xFC0000
Signed 24-bit I2ADC result register, VSHUNT = −(I2 × 1 µV) = I2B − I2A; inverted gain compared to I1.
VB1
RO, FRZ
0x7FFF
0x8000
Signed 16-bit VB1ADC result register, VBAT = VB1 × 100 µV.
VB2
RO, FRZ
0x7FFF
0x8000
Signed 16-bit VB2ADC result register, VBAT = −(VB2 × 85 µV); inverted gain compared to VB1.
Table 44 lists the accumulated measurement result registers.
The current measurement accumulation results IxACC are not
valid during diagnostic operation. Only in the continuous non-
diagnostic measurement mode, the IxADC results are summed
up to the accumulation results IxACC.
Table 44. I1ADC, VB1ADC, I2ADC, VB2ADC Accumulation Registers
Name
Type
Reset
CLRA
Description
VB1ACC
RO, FRZ
0x7FFFFF
0x800000
Signed 24-bit VB1ADC accumulation register, VBAT_AVERAGED = VB1ACC × 100 µV ÷ ACCN.
VB2ACC
RO, FRZ
0x7FFFFF
0x800000
Signed 24-bit VB2ADC accumulation register, VBAT_AVERAGED = VB2ACC × (−85 µV) ÷ ACCN.
I1ACC
RO, FRZ
0x7FFFFF
0x800000
Signed 24-bit I1ADC accumulation register, VSHUNT_AVERAGED = I1ACC × 1 µV ÷ ACCN.
I2ACC
RO, FRZ
0x7FFFFF
0x800000
Signed 24-bit I2ADC accumulation register, VSHUNT_AVERAGED = I2ACC × (−1 µV) ÷ ACCN.
Registers and bits that are subject to the SNAP, UNSNAP
protocol are marked with FRZ in the Type column of the
register and bit descriptions. See Snapshot Commands section
on operation of the SNAP, UNSNAP commands.
Table 45. I1ADC, VB1ADC, I2ADC, VB2ADC Return Values
Command
BYTE 5
BYTE 4
BYTE 3
BYTE 2
BYTE 1
BYTE 0
RDI
I2[23:16]
I2[15:8]
I2[7:0]
I1[23:16]
I1[15:8]
I1[7:0]
RDVB
VB2[15:8]
VB2[7:0]
VB1[15:8]
VB1[7:0]
0xFF
RDIACC
I2ACC[23:16]
I2ACC[15:8]
I2ACC[7:0]
I1ACC[23:16]
I1ACC[15:8]
I1ACC[7:0]
RDVBACC
VB2ACC[23:16]
VB2ACC[15:8]
VB2ACC[7:0]
VB1ACC[23:16]
VB1ACC[15:8]
VB1ACC[7:0]
RDIVB1
VB1[15:8]
VB1[7:0]
0xFF
I1[23:16]
I1[15:8]
I1[7:0]
RDIVB1ACC
VB1ACC[23:16]
VB1ACC[15:8]
VB1ACC[7:0]
I1ACC[23:16]
I1ACC[15:8]
I1ACC[7:0]
Table 46. RDALLI Return Values
BYTE
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
0
I1[7:0]
1
I1[15:8]
2
I1[23:16]
3
I2[7:0]
4
I2[15:8]
5
I2[23:16]
6
VB1[7:0]
7
VB1[15:8]



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