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ADBMS2950BCCSZ Arkusz danych(PDF) 14 Page - Analog Devices |
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ADBMS2950BCCSZ Arkusz danych(HTML) 14 Page - Analog Devices |
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14 / 97 page ![]() ADBMS2950B Data Sheet Rev. 0 | Page 14 of 97 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 5.ADBMS2950B Pin Configuration Table 20. Pin Function Descriptions Pin No. Mnemonic Type Description 40 VDD S GPO and DRIVE Power-Supply Voltage Input. Bypass this pin to PCB ground plane with a 0.1 μF (or greater) capacitor. Connect to VREG for 5V only supply option. 42 VREG S Main Power-Supply Input. Bypass this pin to PCB ground plane with a 1 μF (or greater) capacitor. Connect to VDD for 5V only supply option. 41 DRIVE O Control Pin for VREG Supply. Connect the base of an NPN transistor to this pin. Connect the collector to VDD and the emitter to VREG. Leave floating if unused. For recommended external circuitry, see the Providing DC Power section. 44 GND S Power-Supply Ground. Connect to PCB ground plane. 46 SGND I Kelvin Sense Signal Ground Pin. It must be connected to the PCB ground plane. Ensure separation of signal ground paths from power ground paths by placement of components and optional slots in the ground plane. 47 RGND REF Kelvin Sense Reference Ground Pin. Ground connection to the internal references must be connected to the PCB ground plane. Ensure separation of reference and signal ground paths from power ground paths by placement of components and optional slots in the ground plane. |
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