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ATmega325P Arkusz danych(PDF) 79 Page - ATMEL Corporation |
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ATmega325P Arkusz danych(HTML) 79 Page - ATMEL Corporation |
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79 / 364 page ![]() 79 8023F–AVR–07/09 ATmega325P/3250P 13.3.5 Alternate Functions of Port G The alternate pin configuration is as follows: Note: 1. Port G, PG5 is input only. Pull-up is always on. See Table 25-3 on page 272 for RSTDISBL fuse. The alternate pin configuration is as follows: • RESET – Port G, Bit 5 RESET: External Reset input. When the RSTDISBL Fuse is programmed (‘0’), PG5 will function as input with pull-up always on. • T0 – Port G, Bit 4 T0, Timer/Counter0 Counter Source. • T1 – Port G, Bit 3 T1, Timer/Counter1 Counter Source. Table 13-14 and Table 13-15 relates the alternate functions of Port G to the overriding signals shown in Figure 13-5 on page 69. Table 13-13. Overriding Signals for Alternate Functions in PF3:PF0 Signal Name PF3/ADC3 PF2/ADC2 PF1/ADC1 PF0/ADC0 PUOE 00 00 PUOV 00 00 DDOE 0 0 0 0 DDOV 0 0 0 0 PVOE 00 00 PVOV 00 00 PTOE –– –– DIEOE 0 0 0 0 DIEOV 0 0 0 0 DI –– –– AIO ADC3 INPUT ADC2 INPUT ADC1 INPUT ADC0 INPUT Table 13-14. Port G Pins Alternate Functions (SEG refers to 100-pin/64-pin pinout) Port Pin Alternate Function PG5 RESET(1) PG4 T0(Timer/Counter0 Clock Input) PG3 T1(Timer/Counter1 Clock Input) PG2 – PG1 – PG0 – |
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