ATmega325P datasheet(56/364 Pages) ATMEL

56 / 364 page

8023F–AVR–07/09

ATmega325P/3250P

Address

Labels Code

Comments

;

.org 0x3800/0x7800

0x3800/0x7800

jmp

RESET

; Reset handler

0x3802/0x7802

jmp

EXT_INT0

; IRQ0 Handler

0x3804/0x7804

jmp

PCINT0

; PCINT0 Handler

...

;

0x382C/0x782C

jmp

SPM_RDY

; Store Program Memory Ready Handler

;

0x382E/0x782ERESET:ldir16,high(RAMEND); Main program start

0x382F/0x782F

out

SPH,r16

; Set Stack Pointer to top of RAM

0x3830/0x7830

ldi

r16,low(RAMEND)

0x3831/0x7831

out

SPL,r16

0x3832/0x7832

sei

; Enable interrupts

0x3833/0x7833

<instr>

xxx

11.2.1

Moving Interrupts Between Application and Boot Space

The MCU Control Register controls the placement of the Interrupt Vector table.

11.3

11.3.1

MCUCR – MCU Control Register

• Bit 1 – IVSEL: Interrupt Vector Select

When the IVSEL bit is cleared (zero), the Interrupt Vectors are placed at the start of the Flash

memory. When this bit is set (one), the Interrupt Vectors are moved to the beginning of the Boot

Loader section of the Flash. The actual address of the start of the Boot Flash Section is deter-

mined by the BOOTSZ Fuses. Refer to the section ”Boot Loader Support – Read-While-Write

Self-Programming” on page 256 for details. To avoid unintentional changes of Interrupt Vector

tables, a special write procedure must be followed to change the IVSEL bit:

Write the Interrupt Vector Change Enable (IVCE) bit to one.

Within four cycles, write the desired value to IVSEL while writing a zero to IVCE.

Interrupts will automatically be disabled while this sequence is executed. Interrupts are disabled

in the cycle IVCE is set, and they remain disabled until after the instruction following the write to

IVSEL. If IVSEL is not written, interrupts remain disabled for four cycles. The I-bit in the Status

Note:

If Interrupt Vectors are placed in the Boot Loader section and Boot Lock bit BLB02 is programmed,

interrupts are disabled while executing from the Application section. If Interrupt Vectors are placed

in the Application section and Boot Lock bit BLB12 is programed, interrupts are disabled while

executing from the Boot Loader section. Refer to the section ”Boot Loader Support – Read-While-

Write Self-Programming” on page 256 for details on Boot Lock bits.

Bit

543

0x35 (0x55)

JTD

BODS

BODSE

PUD

–

IVSEL

IVCE

MCUCR

Read/Write

R/W

Initial Value

ATmega325P Arkusz danych(PDF) 56 Page - ATMEL Corporation

ATmega325P Arkusz danych(HTML) 56 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Arkusz danych Pobierz

Link URL