ADL5243ACPZ-R7 datasheet(27/32 Pages) AD

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Data Sheet

ADL5243

Rev. A | Page 27 of 32

EVALUATION BOARD

The schematic of the ADL5243 evaluation board is shown in

Figure 65. All RF traces on the evaluation board have a

characteristic impedance of 50 Ω and are fabricated from

Rogers3003 material. The traces are CPWG with a width of

25 mils, spacing of 20 mils, and dielectric thickness of 10 mils.

The input and output to the DSA and amplifier should be ac-

coupled with capacitors of appropriate value to ensure

broadband performance. The bias to AMP1 is provided through

a choke connected to the AMP1OUT pin and, similarly, bias to

AMP2 is provided through a choke connected to the AMP2OUT

pin. Bypassing capacitors are recommended on all supply lines

to minimize RF coupling. The DSA and the amplifiers can be

individually biased or connected to the VDD plane through

Resistors R1, R2, and R11.

When configuring the ADL5243 evaluation board in the

AMP1-DSA-AMP2 loop, remove Capacitors C1, C4, C5, and

C8 and remove Resistor R10. Place 100 pF in place of C2, 10 pF

in place of C6, and 0 Ω in place of C7 and C24. If needed,

placing a shunt capacitor (1.3 pF) at the output of the DSA

improves the output return loss of this loop.

On the digital signal traces, provisions for an RC filter are made

to clean any potential coupled noise. In normal operation,

Resistors R3 to R9 are 0 Ω and Capacitors C9 to C15 are open.

Table 10. Evaluation Board Configurations Options

Component

Function

Default Value

C1, C5

AC coupling caps for DSA.

C1, C5 = 100 pF

C4, C21

AC coupling capacitors for AMP1.

C4, C21 = 0.1 μF

C13, C14, C15

Power supply bypassing capacitors for AMP1. Capacitor C15 should be

closest to the device.

C13 = 1 μF

C14 = 1.2 nF

C15 = 68 pF

The bias for AMP1 comes through L1 when connected to a 5 V supply. L1

should be high impedance for the frequency of operation, while

providing low resistance for the dc current.

L1 = 470 nH

AMP2 input ac-coupling capacitor.

C8 = 10 pF

C23

AMP2 output ac-coupling capacitor.

C23 = 10 pF

C22

AMP2 shunt output tuning capacitor.

C22 = 1.0 pF at 244 mils from edge of

package

C26

ANP2 shunt input tuning capacitor.

DNP

C27

AMP2 series input tuning capacitor.

C27 = 2.2 pF

C28

AMP2 shunt input tuning capacitor.

C28 = 1.8 pF at 366 mils from edge of

package

C3, C25, C20

Power supply bypassing capacitors for AMP2. Capacitor C3 should be

closest to the device.

C3 = 10 pF

C25 = 10 nF

C20 = 10 μF

The bias for AMP2 comes through L2 when connected to a 5 V supply. L1

should be high impedance for the frequency of operation, while

providing low resistance for the dc current.

L2 = 9.5 nH

C17

Power supply bypassing capacitor.

C17 = 0.1 μF

R10, R12

Placeholder for the series component for the other frequency band.

R10, R12 = 0 Ω

R3, R4, R5, R6, R7,

R8, R9

Digital signal filter resistors.

R3, R4, R5, R6, R7, R8, R9 = 0 Ω

C9, C10, C11, C12,

C16, C18, C19

Digital signal filter capacitors.

C9, C10, C11, C12, C16, C18, C19 = open

C2, C6, C7, C24

Replace with capacitors and resistors to connect the device in a loop.

C2, C6, C7, C24 = open

R1, R2, R11

Resistors to connect the supply for the amplifier and the DSA to the same

VDD plane.

R1, R2 = open

Switch to change between serial and parallel mode operation; connect

to a supply for parallel mode and to ground for serial mode operation.

3-pin rocker

Digital control.

9-pin connector

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