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UJA1069 Arkusz danych(PDF) 37 Page - NXP Semiconductors

Numer części UJA1069
Szczegółowy opis  LIN fail-safe system basis chip
PDF  64 Pages
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UJA1069 Arkusz danych(HTML) 37 Page - NXP Semiconductors

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UJA1069_2
© NXP B.V. 2007. All rights reserved.
Preliminary data sheet
Rev. 02 — 5 March 2007
37 of 64
NXP Semiconductors
UJA1069
LIN fail-safe system basis chip
Table 19.
System Configuration register and System Configuration Feedback register: status at reset
Symbol
Name
Power-on
Start-up
Restart
Fail-Safe
RLC
Reset Length Control
0 (short)
no change
1 (long)
1 (long)
V3C
V3 Control
00 (off)
no change
no change
no change
V1CMC
V1 Current Monitor
Control
0 (watchdog
restart)
no change
no change
no change
WEN
Wake Enable
1 (enabled)
no change
no change
no change
WSC
Wake Sample Control
0 (control)
no change
no change
no change
ILEN
INH/LIMP Enable
0 (floating)
see Figure 12
if ILC = 1,
otherwise no change
0 (floating) if ILC = 1,
otherwise no change
1 (active)
ILC
INH/LIMP Control
0 (LOW)
no change
no change
0 (LOW)
Table 20.
Physical Layer Control register and Physical Layer Control Feedback register: status at reset
Symbol
Name
Power-on
Start-up
Restart
Fail-Safe
LMC
LIN Mode Control
0 (Active mode
disabled)
no change
no change
no change
LSC
LIN Slope Control
0 (normal)
no change
no change
no change
LDC
LIN Driver Control
0 (LIN 2.0)
no change
no change
no change
LWEN
LIN Wake-up Enable
1 (enabled)
no change
no change
no change
LTC
LIN Transmitter Control 0 (on)
no change
no change
no change
Table 21.
Special Mode register: status at reset
Symbol
Name
Power-on
Start-up
Restart
ISDM
Initialize Software Development Mode
0 (no)
no change
no change
ERREM
Error pin emulation mode
0 (EN function)
no change
no change
WDPRE
Watchdog Prescale Factor
00 (factor 1)
no change
no change
V1RTHC
V1 Reset Threshold Control
00 (90 %)
no change
00 (90 %)
Table 22.
General Purpose register 0 and General Purpose Feedback register 0: status at reset
Symbol
Name
Power-on
Start-up
Restart
DIC
Device Identification Control
0 (Device ID)
no change
no change
GP0[10:7]
general purpose bits 10 to 7 (version)
Mask version
no change
no change
GP0[6:0]
general purpose bits 6 to 0 (SBC type)
000 0101 (UJA1069) no change
no change
Table 23.
General Purpose register 1 and General Purpose Feedback register 1: status at reset
Symbol
Name
Power-on
Start-up
Restart
GP1[11:0]
general purpose bits 11 to 0
0000 0000 0000
no change
no change



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