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UJA1069 Arkusz danych(PDF) 55 Page - NXP Semiconductors

Numer części UJA1069
Szczegółowy opis  LIN fail-safe system basis chip
PDF  64 Pages
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UJA1069 Arkusz danych(HTML) 55 Page - NXP Semiconductors

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UJA1069_2
© NXP B.V. 2007. All rights reserved.
Preliminary data sheet
Rev. 02 — 5 March 2007
55 of 64
NXP Semiconductors
UJA1069
LIN fail-safe system basis chip
tTXDL(dom)(dis)
TXDL permanent dominant
disable time
Active mode; TXDL = 0 V
20
-
80
ms
Battery monitoring
tBAT42(L)
BAT42 LOW time for
setting PWONS
5-
20
µs
tSENSE(L)
BAT42 LOW time for
setting BATFI
5-
20
µs
Power supply V1; pin V1
tV1(CLT)
V1 clamped LOW time
during ramp-up of V1
Start-up mode; V1 active
229
-
283
ms
Power supply V3; pin V3
tw(CS)
cyclic sense period
V3C[1:0] = 10; see Figure 13
14
-
18
ms
V3C[1:0] = 11; see Figure 13
28
-
36
ms
ton(CS)
cyclic sense on-time
V3C[1:0] = 10; see Figure 13
345
-
423
µs
V3C[1:0] = 11; see Figure 13
345
-
423
µs
Wake-up input; pin WAKE
tWU(ipf)
input port filter time
VBAT42 = 5 V to 27 V
5
-
120
µs
VBAT42 = 27 V to 52 V
30
-
250
µs
tsu(CS)
cyclic sense sample setup
time
V3C[1:0] = 11 or 10;
see Figure 13
310
-
390
µs
Watchdog
tWD(ETP)
earliest watchdog trigger
point
programmed Nominal
Watchdog Period (NWP);
Normal mode
0.45
× NWP -
0.55
× NWP
tWD(LTP)
latest watchdog trigger
point
programmed nominal
watchdog period; Normal
mode, Standby mode and
Sleep mode
0.9
× NWP -
1.1
× NWP
tWD(init)
watchdog initializing period watchdog time-out in Start-up
mode
229
-
283
ms
Fail-safe mode
tret
retention time
Fail-safe mode; wake-up
detected
1.3
1.5
1.7
s
Reset output; pin RSTN
tRSTN(CHT)
clamped HIGH time,
pin RSTN
RSTN driven LOW internally
but RSTN pin remains HIGH
115
-
141
ms
tRSTN(CLT)
clamped LOW time,
pin RSTN
RSTN driven HIGH internally
but RSTN pin remains LOW
229
-
283
ms
tRSTN(INT)
interrupt monitoring time
INTN = 0
229
-
283
ms
tRSTNL
reset lengthening time
after internal or external reset
has been released; RLC = 0
0.9
-
1.1
ms
after internal or external reset
has been released; RLC =1
18
-
22
ms
Table 26.
Dynamic characteristics …continued
Tvj = −40 °C to +150 °C; VBAT42 =5.5 V to52V; VBAT14 =5.5 V to27V; VBAT42 ≥ VBAT14 − 1 V; unless otherwise specified. All
voltages are defined with respect to ground. Positive currents flow into the IC.[1]
Symbol
Parameter
Conditions
Min
Typ
Max
Unit



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