CY8C53_11 datasheet(54/106 Pages) CYPRESS

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PSoC® 5: CY8C53 Family Datasheet

Document Number: 001-66237 Rev. *A

Page 54 of 106

8.11 Sample and Hold

The main application for a sample and hold, is to hold a value

stable while an ADC is performing a conversion. Some

applications

require

multiple

signals

sampled

simultaneously, such as for power calculations (V and I).

Figure 8-12. Sample and Hold Topology

(

Φ1 and Φ2 are opposite phases of a clock)

8.11.1 Down Mixer

The S+H can be used as a mixer to down convert an input signal.

This circuit is a high bandwidth passive sample network that can

sample input signals up to 14 MHz. This sampled value is then

held using the opamp with a maximum clock rate of 4 MHz. The

output frequency is at the difference between the input frequency

and the highest integer multiple of the Local Oscillator that is less

than the input.

8.11.2 First Order Modulator - SC Mode

A first order modulator is constructed by placing the switched

capacitor block in an integrator mode and using a comparator to

provide a 1-bit feedback to the input. Depending on this bit, a

reference voltage is either subtracted or added to the input

signal. The block output is the output of the comparator and not

the integrator in the modulator case. The signal is downshifted

and buffered and then processed by a decimator to make a

delta-sigma converter or a counter to make an incremental

converter. The accuracy of the sampled data from the first-order

modulator is determined from several factors.

The main application for this modulator is for a low frequency

ADC with high accuracy. Applications include strain gauges,

thermocouples, precision voltage, and current measurement

9. Programming, Debug Interfaces,

Resources

The Cortex-M3 has internal debugging components, tightly

integrated with the CPU, providing the following features:

SWD access

Flash Patch and Breakpoint (FPB) block for implementing

breakpoints and code patches

Data Watchpoint and Trigger (DWT) block for implementing

watchpoints, trigger resources, and system profiling

Instrumentation Trace Macrocell (ITM) for support of printf-style

debugging

PSoC devices include extensive support for programming,

testing, debugging, and tracing both hardware and firmware.

SWD supports all programming and debug features of the

device. The SWV provides trace output from the DWT and ITM.

For more information on PSoC 5 programming, refer to the

application note AN64359 - In-System Programming for

PSoC® 5.

Cortex-M3 debug and trace functionality enables full device

debugging in the final system using the standard production

device. It does not require special interfaces, debugging pods,

simulators, or emulators. Only the standard programming

connections are required to fully support debug.

The PSoC Creator IDE software provides fully integrated

programming and debug support for PSoC devices. The low cost

MiniProg3 programmer and debugger is designed to provide full

programming and debug support of PSoC devices in conjunction

with the PSoC Creator IDE. PSoC interfaces are fully compatible

with industry standard third party tools.

All Cortex-M3 debug and trace modules are disabled by default

and can only be enabled in firmware. If not enabled, the only way

to reenable them is to erase the entire device, clear flash

protection, and reprogram the device with new firmware that

enables them. Disabling debug and trace features, robust flash

protection, and hiding custom analog and digital functionality

inside the PSoC device provide a level of security not possible

with multichip application solutions. Additionally, all device

interfaces can be permanently disabled (Device Security) for

applications concerned about phishing attacks due to a

maliciously

reprogrammed

device.

Permanently

disabling

interfaces is not recommended in most applications because the

designer

then

cannot

access

the

device.

Because

all

programming, debug, and test interfaces are disabled when

Device Security is enabled, PSoCs with Device Security enabled

may not be returned for failure analysis.

V i

V ref

V out

Vref

V ref

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