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QG80331M667 Arkusz danych(PDF) 14 Page - Intel Corporation

Numer części QG80331M667
Szczegółowy opis  Intel 80331 I/O Processor Specification Update
PDF  67 Pages
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Producent  INTEL [Intel Corporation]
Strona internetowa  http://www.intel.com
Logo INTEL - Intel Corporation

QG80331M667 Arkusz danych(HTML) 14 Page - Intel Corporation

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Specification Update
Intel® 80331 I/O Processor
Summary Table of Changes
Specification Changes
No.
Steppings
Page
Status
Specification Changes
A-1
B-0
C-x
D-0
D-1
1
XX
XX
X
47
Doc
HPI# (High Priority Interrupt) is a maskable interrupt
2
XX
XX
X
47
Doc
PCIODT_EN Reset Strap Signal
3
XX
XX
X
47
Doc
LOCK# functionality has been de-featured
4
XX
XX
X
47
Doc
Watchdog Timer and Retry Timer has been de-featured
5
XX
X
X
47
Doc
P_GNT# and P_REQ# signals have new ball locations on
B-0
6
XX
XX
X
47
Doc
Peripheral Performance Monitor Unit has been de-featured
7
XX
XX
X
48
Doc
Processor Device ID has been removed
8
XX
XX
X
48
Doc
1.5K pull-down required on AD[15] of the PBI bus
9
XX
XX
X
48
Doc
OCD and Receive Enable calibration de-featured
10
XX
X
X
48
Doc
New Watchdog Timer (WDT) functionality in B-0 stepping
11
XX
XX
X
48
Doc
PWRDELAY needs only a pull-up for battery back-up mode
12
XX
XX
X
48
Doc
ARB_EN signal has been de-featured
13
XX
XX
X
48
Doc
Intel® 80331 I/O Processor Design Guide change for
Unbuffered DDR-I dual-banked DIMMs
14
XX
XX
X
48
Doc
DDRRES2 can be pulled down to reduce current during
self-refresh
15
XX
XX
X
48
Doc
Intel® 80331 I/O Processor Design Guide change for
Peripheral Bus Interface (PBI)
16
XX
XX
X
49
Doc
Intel® 80331 I/O Processor Design Guide change for
PCI/-X busses
17
XX
49
Doc
Internal bus operates at 333 MHz for D-0 stepping
18
XX
49
Doc
Application Accelerator Unit enhanced for D-0 stepping
19
XX
XX
X
49
Doc
Recommended DLL register values
20
XX
XX
X
49
Doc
DDR-II JEDEC initialization sequence includes writes to
EMRS2 and EMRS3
21
XX
XX
X
50
Doc
Case temperature (Tcase) change
22
X
50
Fixed
Internal Clock Misalignment.



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